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> So you need to be very efficient with the installed base of software That's only somewhat true. Until the modern era of cloud hyperscalers, fairly weird arch
by cpgxiii 6y ago
> So you need to be very efficient with the installed base of software
That's only somewhat true. Until the modern era of cloud hyperscalers, fairly weird architectures with poor compatibility were quite successful, especially in HPC and defense markets. Cell and its derivatives were successful for their time. Any number of quirky microcontroller architectures were successful before the Cortex-M family came to dominate (and some still are). Yes, the startup costs are always going to be high, but success in the broader market isn't necessary for a performant architecture to survive.
> Maybe this will favour experimentations?
I don't think so, if anything the high performance aarch64 designs like Apple's M1 are more similar to x86_64 designs than previous generations. Large caches, wide execution, serious OoO, stronger-than-expected memory ordering. I think more experimentation will come from the RISC-V community targeting more specific applications.
- renox 6y ago>if anything the high performance aarch64 designs like Apple's M1 are more similar to x86_64 designs than previous generations. And? If an 'exotic ISA' can really offer some improvement, it must be able to compete with 'the best of the best' implementation of current ISA..
- cpgxiii 6y agoThe point is that if you're looking for distinctly different approaches than the currently dominant x86_64, aarch64 implementations are not where to look.