4 ms·
I have been trying to explain to people that having the DRAM chips physically next to the SOC on the package does not actually meaningfully improve memory laten
by chungus_khan 6y ago
I have been trying to explain to people that having the DRAM chips physically next to the SOC on the package does not actually meaningfully improve memory latency.
I get that people on this site are excited, but please be excited about the right things.
- epistasis 6y agoYeah, speed of PCB transmission is ~8 inches (~20cm) per nanosecond. Which is about 2/3 of the classic "light-nanosecond", which is roughly a foot.
- rsynnott 6y agoPeople seem to have dramatically missed the point here; it's almost certainly done for power reasons.
- tuatoru 6y agoAnd also for silicon budget, probably: short distances require small interface transistors and thin wires compared to massive distances like 5cm. The chip area can be re-used for compute-sized transistors and wires (much, much smaller than interface transistors and wires, so there can be many more of them).