5 ms·
Even without OS, or SMM on x86's, preemptions modern desktop cpu caches can cause large jitter. Writing/reading to the GPIO registers can take a variable number
by elcritch 6y ago
Even without OS, or SMM on x86's, preemptions modern desktop cpu caches can cause large jitter. Writing/reading to the GPIO registers can take a variable number of cycles. Though I've toyed with disabling Linux scheduling on RPi3's last core and manually run a program on it. Fairly easy to do. It does really help jitter, but still not as reliable as a dedicated MCU.