3 ms·

I wonder if such explicit cache manipulation instructions will ever make their way into an x86_64 extension.

• Const-me 6y ago
  I know 2 related instructions, prefetch used by the OP, and clflush to flush a line. AFAIK there’s no way to query cache state for an address. With these recent spectre/meltdown/etc, I wouldn’t expect to see an instruction to query cache state for an address, at least in a foreseeable future. An easy implementation probably gonna be a side channel attack vector.
  • PoignardAzur 6y ago
    Afaik the clflush instruction isn't really meant for optimization. It evinces data from all cache levels (so even from L3), which means it's only useful for data you know you won't ever need again. I think the CPU is good enough at flushing that data that additional hints won't improve performance much.
• PoignardAzur 6y ago
  The instruction this is based on is prefetch; which is essentially the only relevant instruction when doing manual cache optimization on x86/x64. It's not a panacea though; naive usage of prefetch will actually decrease performance [0], because the hardware already does a lot of prefetching on its own and you're messing with that. From what little research I've done, prefetch mostly improves performance when accessing data in a hot loop, in a non-linear pattern (eg nextAddress isn't just prevAdress + constantValue), 3-4 loop iterations ahead of the execution. Eg doThings(myArrayOfPointers[i]); __builtin_prefetch(myArrayOfPointers[i + 4]); (though the above code might be undefined behavior if i + 4 is bigger than the array size, I'm not sure) [0]: https://lwn.net/Articles/444336/ https://lwn.net/Articles/444336/