4 ms·
Out of curiosity, have you benchmarked this against some of the more standard NN libraries running on CPU?
by kevinventullo 6y ago
Out of curiosity, have you benchmarked this against some of the more standard NN libraries running on CPU?
- deleted 6y ago[deleted]
- 37ef_ced3 6y agoNo, the convolution generators were written to saturate the hardware For example, under ideal conditions (no out-of-register memory access, no waiting on dependencies) you can sustain 27 single-precision FMADDs per CPU-core per cycle on a particular Skylake-X (i.e., approx 1.7 _mm512_fmadd_ps per cycle, each yielding 16 multiply-adds) As soon as you start accessing memory, that number drops to about 20 FMADDs. With direct convolution methods (1x1 and arbitrary), the best you can do is achieve that, and NN-512 comes close With the Fourier and Winograd convolutions, you start being limited by memory bandwidth, but the reduction in FMADDs that these methods provide means you end up ahead: your "effective" FMADD rate is much higher than what is possible through direct convolution. For example, NN-512 can exceed 48 effective FMADDs per cycle (on the 27 peak FMADD machine) with Winograd-Cook-Toom-Lavin, if the tensor is deep enough (enough channels) So, NN-512 succeeds in saturating the hardware. Essentially all the time is spent in the matrix multiplications, doing FMADDs, or being blocked bringing half-precision weights into register for Fourier or Winograd Until I generate a table of comparisons, you can use the previously stated number to do rough comparisons against the literature or other software packages: 18 DenseNet121 inferences per CPU-core per second on a cheap Skylake-X cloud instance
- jklontz 6y ago> For example, NN-512 can exceed 48 effective FMADDs per cycle (on the 27 peak FMADD machine) with Winograd-Cook-Toom-Lavin, if the tensor is deep enough (enough channels) Roughly how many channels do you need for this approach to be worthwhile?
- 37ef_ced3 6y agoEnough that the data panel of the input tensor fills the thread's share of the L2 cache, and the output tensor is of similar depth So it depends on the cache size, but you can think of it as being about 512 channels in, 512 channels out, something like that