4 ms·
3D transistors so cubic milimeter might be better?
by ConcernedCoder 6y ago
3D transistors so cubic milimeter might be better?
- wtallis 6y agoThe transistors are 3D only in the sense that FinFETs aren't just wires on top of a flat surface of doped silicon. There's still no 3D stacking of one transistor on top of another, and transistor density is still best measured by how much 2D wafer area is occupied by a transistor. This is very different from the situation for NAND flash memory, where the memory cell array is genuinely 3D and pushing toward hundreds of layers of memory cells, so volumetric measurements are starting to become useful. (However, the horizontal dimensions of various 3D NAND designs are roughly similar, so comparing simply in terms of layer count is a good first approximation of bit density.)
- Sohcahtoa82 6y agoWhy aren't we stacking layers of transistors in CPUs? Is it because of heat dissipation issues?
- fpoling 6y agoYes, but another reason is that in flash only tiny amount of cells are active at time. So even with much bigger cells that are required for reliable 3D stacking and more heat production per cell it is still very ok.
- themule 6y agowe are starting to and beginning to stack transistors on top of each other. It is a heat dissipation issue but it seems like we will be done.
- xiphias2 6y agoWhat really matters is energy efficiency (watts/transistor or watts/some computation that utilizes the chip well)