4 ms·
We still have ways to go. The node name (3nm) in this example is pure marketing, there is no feature that is 3nm small on the die(s). Smallest feature size is
by lldbg 6y ago
We still have ways to go.
The node name (3nm) in this example is pure marketing, there is no feature that is 3nm small on the die(s). Smallest feature size is rather 10-30 nm, and you can (again, side of napkin calculation) squeeze in 100 atoms in that space.
- civilized 6y agoIs there any rationale at all for the name? Maybe it's about how precisely things like corners can be etched, even if the smallest features are much larger than that?
- ebruchez 6y agoDon't look for a rationale. See this recent article "The Node Is Nonsense: https://read.nxtbook.com/ieee/spectrum/spectrum_na_august_2020/the_node_is_nonsense.html https://read.nxtbook.com/ieee/spectrum/spectrum_na_august_20... It goes in depth into this topic.
- squeals_colder 6y agoI thought the change in node name was relative to the percent improvement in density, i.e 70% increase in density 5 / 1.7 ~= 3
- tmd83 6y agoWas there a point lets say at 130nm when the name of the process was meaningful and if so what component of the gate was at X nm for it to be called a X nm process?
- sroussey 6y agoProblem is that gate design itself changed.
- jl2718 6y agoI brought up the first ever 110nm node and it was based on the memory half-cell width in a standard way that we didn’t use because it didn’t functionally scale down to that size anymore, but the lithography equipment could make something that passed Intel’s TEM inspection according to expert analysis. So, from what I understand, not since Intel left the DRAM business.