> Shortening the wire also lowers latency between all the various on board devices, so communicating everywhere is faster. A maximum of a few nanoseconds. Not

> Shortening the wire also lowers latency between all the various on board devices, so communicating everywhere is faster. A maximum of a few nanoseconds. Not much in comparison to an overall memory system latency. > Shorten the wire to memory cells and not only can you make signaling faster and run the memory at faster clock speed but you can do it with less accessory hardware for signal conditioning and error correction, which saves complexity and power. You cannot run away from that with just shorter PCB distance. The circuitry for link training is mandated by the standard. You will need a redesigned memory standard for that.