3 ms·
As the article points out part of the reason is that the ARM's RISC instruction set has a lot more room for optimization than the x86 CISC instruction set, whic
by dreamcompiler 6y ago
As the article points out part of the reason is that the ARM's RISC instruction set has a lot more room for optimization than the x86 CISC instruction set, which Intel has been milking since 1972. If that were the whole story, ARMs would have been faster than Intel long before now, so there's obviously much more going on than simply RISC vs. CISC.
Still, I find it gratifying that my least favorite instruction set of all time may finally be going the way of the dinosaur.
- AsyncAwait 6y ago> Still, I find it gratifying that my least favorite instruction set of all time may finally be going the way of the dinosaur. Only I fear it won't be replaced by anything more open.