7 ms·
You mention most of the big changes, except one. Assuming a random (but TLB friendly) pattern the M1 manages a latency of around 30-33ns to main memory, about
by sliken 6y ago
You mention most of the big changes, except one. Assuming a random (but TLB friendly) pattern the M1 manages a latency of around 30-33ns to main memory, about half of what I've seen anywhere else. Impressive.
Maybe motherboards should stop coming with dimms and use the apple approach to get great bandwidth and latency and come in 16, 32, and 64GB varieties by soldering LPDDR4x on the motherboard.
- brandmeyer 6y ago> Assuming a random (but TLB friendly) pattern the M1 manages a latency of around 30-33ns to main memory. This, right here. It also helps that the L1D is a whopping 128 kB and only 3 cycles of load-use latency.
- AlphaSite 6y agoI wonder how they managed that.
- my123 6y agoThe NVIDIA Carmel cores on 12nm had a 64KB L1D cache with a 2 cycles latency.
- throwaway_pdp09 6y agoMeans nothing without saying what the clock goes at.
- my123 6y ago2.26GHz, on a quite old process.
- xpuente 6y agoHuge block size (128bytes). Probably they are using Power7 alike scheduling (i.e. scheduling are working on packs of instructions, That might explain the humorous 600+ entry ROB. Certainly the wake-up logic can't deal with that one-by-one with such a low power). If you combine that with JIT and/or good compilers, you get this. I guess only Apple can pull this trick: they control all the stack (and some key power architects are working there).
- brandmeyer 6y agoBig cache lines and big pages together. 16 kB pages combined with 128-byte lines means it can be 8-way set associative and still take advantage of a VIPT structure. Larger pages mean that performance on memory-mapped small files will suffer... which is a use-case that Apple doesn't normally care about in its client computers. Larger cache lines mean that highly mulththreaded server loads could suffer from false sharing more often. Again, its a client computer so who cares? Regarding the definition of "huge": A64FX uses 256B cache lines. Granted its a numerical computing vector machine, but still. Huge covers a lot of ground.
- jnwatson 6y agoThis is the first I've heard of this. This alone, plus unified memory in general, I bet explains 60% of the performance difference.
- aldanor 6y agoOr maybe use the best of both worlds, with soldered-in ultra fast ram, plus large amount of dimm ram. Same as you can have a storage driver and a smaller nvme.
- kllrnohj 6y ago> Or maybe use the best of both worlds, with soldered-in ultra fast ram That's basically what L3 cache is on Intel & AMD's existing CPUs. You could add an L4, but at some point the amount of caches you go through is also itself a bottleneck, along with being a bit ridiculous.
- sliken 6y agoYet apple is managing excellent performance with just a l1+l2.
- creato 6y agoBut the context of this thread is that it is being done with soldered RAM. I don't know how much that matters, just pointing out that you are taking the conversation in a circle.
- sjwright 6y agoThe way I see it, you could have a Mac Pro with (let’s say) 32GB of super-fast on-package RAM and arbitrarily upgradable DIMM slots. The consequence would be that some RAM would be faster and some would be a bit slower. They would be contiguous, not layered.
- compiler-guy 6y agoThe non-uniform memory performance of such a solution would be a software nightmare.
- sliken 6y agoDoesn't seem much different than various multichip or multisocket solutions where different parts of memory have different latencies, called NUMA. Basically the OS keeps track of how busy pages are and rebalances things for heavily used pages that are placed poorly. Similarly, Optane (in dimm form) is basically slow memory, OSs seem to handle it fine. NUMA support seems pretty mature today and handle common use cases well. With all that said, apple could just add a second CPU to double the ram and cores, seems like a great fit for a Mac Pro.
- impassionedrule 6y agoWe should definitely not continue Apple's approach of soldering every damn component, even if it comes at the cost of performance
- nomel 6y ago> even if it comes at the cost of performance Why? What's the purpose of artificially limiting performance when one doesn't need the upgradability? I've, personally, never upgraded the RAM on any system I've built or carried it to a new motherboard with a new socket. I'm absolutely the target audience for this. I would love this increased performance, as long as it wasn't some surprise. Having the extra plastic on the motherboard is literally e-waste for me. Don't touch my PCI-e slots though.
- ksk 6y agoComponents have flaws, or they break down over time, and soldering components hampers repair and reuse.
- nomel 6y agoI suggest you look up "integrated circuits" and "system on a chip", which is where all of our performance/power improvements have come from. You're in for a shock when it comes to repairability!
- vondro 6y agoNot sure why you're being downvoted, it's completely true! If the SSD in my computer dies, I can just buy another one for cheap (500GB for what, 80 dollars?). If the SSD in my Macbook/Mac Mini dies, either I can buy a new motherboard, or more likely, a new device. It is not economical nor ecological. Also, paying 200 dollars for additional 256GB of storage? WTF.
- hinkley 6y agoUsed to be I'd upgrade my MBP memory and hard drive to eek out one more year between upgrades. The drive could always come back and be reused as a portable drive, and the best memory for an old machine typically was cheap enough by then that it wasn't that big of a deal.
- formerly_proven 6y agoLatencies like this are doable with a lot of tuning on Intel CPUs; out of the box you'll get to the 40s with fast memory. And those CPUs have three cache levels instead of two... A good old-fashioned 2010-era gaming PC would already get down to around 50 ns levels. It's definitely really good, but considering it's rather fast RAM (DDR4 4266 CL16) and doesn't have L3 it's not that surprising.
- my123 6y agoApple M1 has three cache levels: - for big cores, private: 128KB L1D - for big cores, shared within a cluster: 12MB L2 - system-level cache (shared between everything, CPU clusters, GPU, neural engine...): 16MB and then you reach RAM.
- sliken 6y agoI've written a benchmark to measure such thins and from what I can tell. Each fast core has a L1D of 128KB. The fast cores have a cluster with 12MB, cache misses to to main memory. The slow cores have a 4MB L2. The cache misses from the fast L2 can't quite saturate the main memory systems (I believe it's 8 channels of 16 bits). So when all cores are busy you keep 12MB of L2 for fast, 4MB of L2 for the slow cores, and end up getting better throughput from the memory system since you are keeping all 8 channels busy.
- my123 6y agoWonder if the SLC is mostly used for coherency purposes and the other blocks then... And yeah, it's 128-bit wide LPDDR4X-4266, pretty quick imo.
- sliken 6y agoNot just 128 bits wide (standard on high end laptops and most desktops), but 8 channels. The latency is halved and over the last decades I've only been seeing very modest improvements in latency to main memory on the order of 3-5% a year.
- epakai 6y agoBandwidth is comparable with other high-end laptop chipsets (I've seen 60-68 GB/s quoted, and recent Ryzens are 68 GB/s). Is the on-chip latency a big factor in the single core performance?
- sliken 6y agoDepends on the workload. Compilers are famous for being branch heavy and random lookups... something that people have reported excellent performance on the M1. Parsing is hard as well (like say javascript). Of course for any CPU workload it's going to be harder on the memory system when you have video going on. Doubly so for a video conference (compression, decompression, updating the video frames, streaming the results, network activity, reading from the camera, etc). Seems like the apple memory system wouldn't have received as much R&D as it did unless Apple though it was justified. Clearly the speed, performance, and price show that Apple made quite a few good decisions.
- myrandomcomment 6y agoThis reminds me of the Amiga which had FastRAM and ChipRAM. It was all main memory, but the ChipRAM could be directly addressed by all the co-processor HW in the Amiga and the FastRAM could not. It would be sort of interesting for Intel/AMD to do something like this where they have 16GB on the CPU and the OS has the knowledge to see it differently from external RAM. Apple is going to have to do this for their real "Pro" side devices as getting 1TB on the Mx will be a non-starter. I would expect to see the M2 (or whatever) with a large amount of the basic on chip RAM and then an external RAM bus also.
- sliken 6y agoDunno, rumors claim 8 fast cores and 4 slow cores for the follow up. With some package tweaks I think they could double the ram to 32GB inside the package and leave the motherboard interface untouched. I do wonder how many use cases actually need more then 32GB when you have a low latency NVMe flash with 5+ GB/sec of bandwidth and relatively low latencies. Especially with the special magic sauce that I've seen mentioned related to hardware acceleration for either compressing memory or maybe it was compressing swap. In any case, I'm not expecting the top of the line for the next releases. Step 1 is low end (mba, mbp13", and mini). Step 2 is mid range, rumored to be a MBP 14.1" and 16 in first half of 2021". After that presumably the mac pro desktop and Imac's "within 2 years". Maybe step #3 will be a dual socket version of step #2 with of course double the ram.
- greyhair 6y agoUnless you are doing some crazy synthesis or simulation, 32GB is plenty. Maybe editing 4K (or in the future, 8K) video might need more? My brother does a lot of complex thermal airflow simulation, and his workstation has 192GB of RAM, but that is an extreme use case.
- threeseed 6y ago8GB MacBook Air can easily handle 4K. And it can handle 8K for 1-2 streams and starts to lag at 4+.
- threeseed 6y agoMemory usage has definitely stalled over the last decade as more applications move to the web or mobile devices. There's just nothing driving most people to have more than 8/16GB of RAM and even photo/video editing has been shown to be a breeze on the 8GB MacBook Air. I wouldn't be surprised to see laptops move to soldered RAM and SSDs.
- baybal2 6y ago> Memory usage has definitely stalled over the last decade as more applications move to the web or mobile devices. I beg you to look at memory consumption of those "lightweight" web apps
- FpUser 6y ago>"Maybe motherboards should stop coming with dimms and use the apple approach to get great bandwidth and latency and come in 16, 32, and 64GB varieties by soldering LPDDR4x on the motherboard." I prefer the upgradeability.
- zerkten 6y ago> I prefer the upgradeability. The market doesn't care about such niche concerns, but it'll not flip completely overnight. I like the idea of upgradeability too, but when the trade-off is such great performance, I'm not going to give that up. It would be different if the performance numbers were not as stark. The open question is how long this performance will be sustained. If it drops off, then concerns like upgradeability make become higher priority (and an opportunity for hardware vendors.)
- FpUser 6y ago>"The market doesn't care about such niche concerns, but it'll not flip completely overnight." I do not care all that much abut market either. When I need something it always seems to be there and I do not mind if it is not produced by the biggest guy on the block. If at some point I would not be able to find what I need I'll deal with it but so far it did not happen.
- piokoch 6y agoYes, this is a niche concern... called environment protection. The new stuff cannot be upgrade, so when amount of RAM stops to be sufficient, old computer needs to be recycled (a modern word for throwing something into waste bin together with all CO2 that was emitted when computer was produced, not to mention environmental costs of digging rare earths, etc.). I am still able to use my Lenovo Thinkpad 510T only because I could easily replace HDD with cheap, stock Samsung EVO SSD and throw more RAM. The absurdity of Apple approach is that Mac Mini with 512 GB SSD is $200 more expensive than the one with 256 GB. 256 GB for $200 is a crazy price, so Apple basically says: hey, pay us a lot, lot more, so maybe you can use our stuff a bit longer, but, in fact, we try to actively discourage you from doing this, since we want you to buy cheaper model and in two-three years you will need to buy a new fancier model. But Tim Cook will tell you a lot how much he cares about humanity, environment and CO2 emission. Maybe he will even fly his private jet to some conference to tell people how awful is all that oil & gas & coal industry.
- kllrnohj 6y ago> Assuming a random (but TLB friendly) pattern the M1 manages a latency of around 30-33ns to main memory, about half of what I've seen anywhere else. Impressive. Cite your number please. Anandtech measured M1's memory latency at 96ns, worse than either a modern Intel or AMD CPU: "In terms of memory latency, we’re seeing a (rather expected) reduction compared to the A14, measuring 96ns at 128MB full random test depth, compared to 102ns on the A14." https://www.anandtech.com/show/16252/mac-mini-apple-m1-tested https://www.anandtech.com/show/16252/mac-mini-apple-m1-teste... vs. "In the DRAM region, we’re measuring 78.8ns on the 5950X" https://www.anandtech.com/show/16214/amd-zen-3-ryzen-deep-dive-review-5950x-5900x-5800x-and-5700x-tested/5 https://www.anandtech.com/show/16214/amd-zen-3-ryzen-deep-di...
- sliken 6y agoWell my comment mentioned "random (but TLB friendly)", which I define as visiting each cache line exactly once, but only with a few (32-64) pages active. The reason for this is I like to separate out the cache latency to main memory and the TLB related latencies. Certainly there are workloads that are completely random (thus the term cache thrashing), but there's also many workloads that only have a few 10s of pages active. Doubly so under linux when if needed you can switch to HUGE pages if your workload is TLB thrashing. For a description of the Anandtech graph you posted see: https://www.anandtech.com/show/14072/the-samsung-galaxy-s10plus-review/5 https://www.anandtech.com/show/14072/the-samsung-galaxy-s10p... So the cache friendly line is the R per RV prange for the 5950X latencies is on the order of 65ns, the similar line for the M1 is dead on 30ns at around 128KB and goes up slightly in the 256-512KB range. Sadly they don't publish the raw numbers and pixel counting on log/log graphs is a pain. However I wrote my own code that produces similar numbers. My numbers are pretty much a perfect match, if my sliding window is 64 pages (average swap distance = 32 pages) I get around 34ns. If I drop it to 32 pages I get 32ns. So the M1, assuming a relatively TLB friendly access pattern only keeping 32-64 pages active is about half the latency of the AMD 5950. So compare the graphs yourself and I can provide more details on my numbers if still curious.