2 ms·
AMD64 has 32 registers: 16 scalar ones, and 16 vector ones. Maybe 34 if you count RIP and flags. From programmer’s perspective, the rest of them are either dif
by Const-me 6y ago
AMD64 has 32 registers: 16 scalar ones, and 16 vector ones. Maybe 34 if you count RIP and flags.
From programmer’s perspective, the rest of them are either different ways to access these 32-34, or very exotic and rarely used.
P.S. Modern compilers don’t normally emit x87 nor MMX instructions, because they are often slower compared to SSE (all AMD64 processors are required to support at least SSE1 and SSE2). For instance, FSQRT on Zen2 has 22 cycles both latency and throughput, VSQRTPD has 20 cycles latency and 8.5 cycles throughput (lower is better), despite taking 4 square roots in one shot. I think it’s safe to assume x87 and MMX instructions are only left for backward compatibility with old 32-bit binaries, when writing new code they can be ignored.