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>"For me probably the coolest thing about RISC-V is it has version with a simple enough architecture that students can code it in a quarter" What do you mean b
by bogomipz 6y ago
>"For me probably the coolest thing about RISC-V is it has version with a simple enough architecture that students can code it in a quarter"
What do you mean by "version" here? How does it add to its accessibility?
I'm curious about your or anyone else's opinion of that "CMSO VLSI Design" text book you linked to. It's quite expensive and I haven't been able to bring myself to buy it. Would you recommend it?
- egsmi 6y agoThis class’s version of RISC-V only implements of subset of all the possible instructions (which of course is totally appropriate) and it’s missing modern concepts (like out of order execution) which are also out of scope for an introductory class. One of the lectures describes basic logic gates so one doesn’t go from that to reorder buffers in a single quarter. I think the Weste text book is an excellent introduction to the reality of (mostly) modern digital VLSI design. My only gripe is it’s weak on analog, which is my forte. For An introduction to the reality of that I think Baker’s text at cmosedu.com is better. Basically, if you have interest in the subject buying a used copy of Weste is not likely to disappoint. Or perhaps see if your local library can snag a copy before you buy.
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- bogomipz 6y agoOh I see. Yes it's a modular design. That's one of the most fascinating elements of the CPU. I wasn't familiar with the version terminology to denote features. Thanks. Also thank for the the feedback on the Weste book. I will try to find a used copy.
- egsmi 6y ago> familiar with the version terminology That's probably because I was using the wrong word. I should've said "variant".
- the_duke 6y ago> What do you mean by "version" here? How does it add to its accessibility? The base variant of RISC-V (RV32/64I) is extremely bare bones. Even instructions for integer multiplication/division and floating points, atomics, ... are all added by extensions. See https://en.wikichip.org/wiki/risc-v/standard_extensions https://en.wikichip.org/wiki/risc-v/standard_extensions
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