RISC-V so far is a turndown for a design, speaking honestly. ARM have by faaaaar the best tooling in the industry, which are more open, than not, and the basel

RISC-V so far is a turndown for a design, speaking honestly. ARM have by faaaaar the best tooling in the industry, which are more open, than not, and the baseline is made on GNU toolchain, only with more fancy debug tools being paid/locked down. RISC-V did not yet benefit from its openness for as long as tooling go. However, RISC-V would still be infinitely better than Cadence, and them wanting $100k for a basic (and terrible) debugger with coresight-like functionality.