Take a look at the examples dir on github: https://github.com/nickmqb/wyre/tree/master/examples https://github.com/nickmqb/wyre/tree/master/examples Then look

Take a look at the examples dir on github: https://github.com/nickmqb/wyre/tree/master/examples https://github.com/nickmqb/wyre/tree/master/examples Then look at the "output" subdirectory and you'll find a verilog generated file for each example of the parent directory.