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I'm building a Minecraft clone in hardware, on a tiny FPGA with 143kb of RAM
- vaccinator 6y agoa Minecraft clone in hardware means all code is hardware?
- function_seven 6y agoYup. The assembly language for this chip will be redstone :)
- nickmqb 6y agoYes and no. The design includes a custom built 16-bit CPU, which uses a custom instruction set, which I wrote an assembler for. There is a small 4kb bank of RAM that contains a program written in this instruction set. From a hardware perspective it is just data, but from a a software perspective it's that program that is ultimately responsible for running the game (by reading input from the gamepad module, setting up GPU registers, etc.).
- young_unixer 6y agoAre you using Minecraft's textures? because those look very similar to Minecraft's actual textures.
- nickmqb 6y agoYes, I am. This also means that any open source distribution won't include those textures. However, if I do end up open sourcing the work I'll make sure to include instructions for people that already own Minecraft; the textures are just .png files that can be extracted from the game's .jar file and can then be transformed to be used on the FPGA.
- guavaNinja 6y agoI suggest you look at minetest[1] textures. It's an opensource minecraft clone. Most textures have CC or MIT licenses. Read license.txt for each texture mod before you use them. They may help in opensourcing your project. [1]: https://github.com/minetest/minetest_game https://github.com/minetest/minetest_game
- franga2000 6y agoI can't remember any off the top of my head, but I'm pretty sure there are a few open source texturepacks for Minecraft that would be a drop-in replacement (same filenames amd structure).
- layoutIfNeeded 6y agoWow, this is some Fabrice Bellard tier stuff! Very impressive!
- throwaway122kk 6y agoThis looks very good well done! Microsoft need to hire you for the team asap! It always cracks me up playing minecraft on xbox one x and once your village hits few hundred villagers framerate (when running beta from insider it's shown on screen) drops to like 3-4fps
- MaxBarraclough 6y agoMinecraft on 40mW. Very cool.
- makapuf 6y agoWow, any details? Somme code ? A repo ? What graphical output? VGA or hdmi ? What input? This is very intriguing...
- nickmqb 6y agoThe screen is connected to the FPGA over VGA. The output resolution is 1024x768 @ 60Hz, but the 3D portion of the screen is rendered at 256x128 @ 30Hz. The design consists of a custom 16-bit CPU (running at 32.6Mhz) and a custom raytracing "GPU" that can handle up to 4 rays in parallel. Input happens via a N64 controller! Those are actually fairly easy to work with at a low level. The code is not public, though I'm considering open sourcing the project when it's done. Moreover, there's a lot of additional details that I could potentially go into, so I'm considering also writing a few blogs posts with more info if people are interested!
- kingosticks 6y agoVery interested, please do!
- anfractuosity 6y agoIt looks very cool! What's the GPU & CPU written in out of interest, I think I saw on your twitter you've written something to translate to verilog, is that used for this?
- nickmqb 6y agoYup, that's correct, the design is implemented in Wyre, which is a hardware definition language that I created. The language compiles to Verilog so it can work with existing hardware development toolchains. The language is open source and can be found here: https://github.com/nickmqb/wyre https://github.com/nickmqb/wyre
- OJFord 6y agoI like the sound of that, but my verilog's rusty, a suggestion for the readme: show what the equivalent verilog would be for the example, or better I suppose the actual verilog that it would transpile to. I suppose your target audience is mainly more familiar with verilog (though not necessarily I suppose - could have only ever used VHDL) but I'm interested in playing with it, just haven't used verilog, or FPGAs at all, since university.
- mentos 6y agoHow is the rendering performance with large worlds?
- nickmqb 6y agoThe FPGA that I'm using for this (the Lattice iCE40 UP5K) is really limited when it comes to RAM, which is the main constraint when it comes to world size. As per the title, there's only 143kb, which is insanely low for doing any kind of 3D stuff :). 48kb is used by the frame buffer, 19kb for textures, which leaves 76kb. 48kb of that is used for the map, which currently limits it to 32x32x32 blocks. However, I do have some plans to improve on that in the future! The FPS (30Hz) is rock steady though! One of my pet peeves when doing DirectX/OpenGL development is that it's really hard to completely avoid frame drops, e.g. if the OS decides to schedule some other thread, or because the GPU driver decided to do something else than render your app. With hardware development, you can side step all of those problems. As a result, the Minecraft clone is guaranteed to not drop frames :).
- Impossible 6y agoOn console and embedded the OS is either non-existent or gives your game guarantees about when it will schedule something and how often. Hardware obviously gives you way more control, but a baremetal raspberry pi project, Arduboy, console homebrew, etc can give you some of that control back in software. Awesome project btw
- roblabla 6y agoAs an example of this, on the Nintendo Switch, games run on three cores dedicated to the game, while the rest of the OS tasks run on the fourth core. Furthermore their scheduler gives precise guarantees about the scheduling order of threads spawned on the same core. It makes sustained 60fps achievable through careful design.
- jfries 6y agoIf you have a guarantee for the worst case of generating a pixel (which you indicate by saying that you never drop frames), couldn't you get rid of the framebuffer? Schedule pixel generation so that they complete just in time for when they're needed for output. This would save up RAM for other things (and be a fun exercice to get right).
- b20000 6y agothis is super awesome! did you build the raytracing stuff from the ground up?
- nickmqb 6y agoThanks! That's correct, I built the ray tracing "GPU" from scratch. It's highly optimized because it needs to trace 256 * 128 * 30 = 0.98 million rays per second on very under powered hardware. It's specifically tailored to fast traversal of voxel grids. There's too many details to go into here, but as I wrote in another comment, I'm considering writing a few blog posts to explain how everything works in more detail!
- Shared404 6y ago> I'm considering writing a few blog posts to explain how everything works in more detail! If you do, I'd love to read them.
- takenpilot 6y agoThis is insane and I love it.
- flatiron 6y agoDid you consider porting it to mister?
- nickmqb 6y agoI probably won't port it to other platforms, however, as I wrote in another comment, I am considering open sourcing it when it's done, so others can port it if they like. I just looked up the MiSTer board [1]. They are using a DE10-Nano FPGA [2], which is a lot more powerful than the iCE40 UP5K [3] that I'm using (for comparison, the DE10-Nano has 110,000 lookup elements, whereas the iCE40 UP5K just has 5,280, so ~20x difference!). So porting should be pretty easy. It also opens up opportunities to increase the resolution, frame rate and render distance. [1] https://github.com/MiSTer-devel/Main_MiSTer/wiki https://github.com/MiSTer-devel/Main_MiSTer/wiki [2] https://www.digikey.com/en/product-highlight/t/terasic-tech/de10-nano https://www.digikey.com/en/product-highlight/t/terasic-tech/... [3] https://www.latticesemi.com/en/Products/FPGAandCPLD/iCE40UltraPlus https://www.latticesemi.com/en/Products/FPGAandCPLD/iCE40Ult...
- etaioinshrdlu 6y agoIt looks like you're using an ice40 FPGA? If you can make your project work with 38 I/O pins you could probably get it fabricated in ASIC by Efabless free. You just need to meet their repository requirements and make your verilog module conform to this interface: https://github.com/efabless/caravel/blob/master/verilog/rtl/user_proj_example.v https://github.com/efabless/caravel/blob/master/verilog/rtl/... The openlane tool converts your verilog all the way down to final ASIC design... You'd need to license everything Apache 2.0 though. And it would have to be done soon, the deadline is Nov 30th.
- nickmqb 6y agoIn terms of I/O pins that should actually be fine (current pinout: VGA (14x), SPI (4x), CLK (1x), N64_controller (1x)), though I'm still working on the project and I don't think it'll be done by the deadline. It looks like they might do future batches though -- it's a cool idea!
- primis 6y agoIf you're using an n64 controller, you might want to consider using a gamecube one instead (it uses the same control logic, it just adds a 5v line for rumble features) Unless you're particularly fond of the N64's controller design that is
- nickmqb 6y agoThat's a good idea. The two analog sticks on the GC controller would be an improvement over the single stick on the N64 controller for movement in 3D. I think that the main benefit of the N64 controller (besides a nostalgia factor, though that may just be me ;)) is how easy it is to connect. I actually just got some wire from the local hardware store, plugged pieces of it into the controller connector, and then attached some IC clips. For the GC controller, things are a bit trickier due to its connector layout, though I just found [1] which might be a nice solution; alternatively, buying a GC controller extension cord and wire stripping could be an option. I'll consider it! [1] https://www.raphnet-tech.com/products/gc_controller_connector/index.php https://www.raphnet-tech.com/products/gc_controller_connecto...