3 ms·
You seem to misunderstand. With too few registers you may have to spill to the stack. You can't turn those into register moves in the presence of stores witho
by FullyFunctional 6y ago
You seem to misunderstand. With too few registers you may have to spill to the stack. You can't turn those into register moves in the presence of stores without a very advanced memory disambiguation.
- gpderetta 6y agotechnically Zen2 does exactly that. They do still use store/load bandwidth though. I guess that counts as very advanced memory disambiguation.
- FullyFunctional 6y agoAll high-end processors do it, but that doesn't come for free (design/verification effort + silicon area/power). Also, the capacity for this is limited to the size of the store buffer so without the needless spills, you can apply all this expensive machinery to more real memory ops. (A similarly but different debate could be had over all the save/reloads we incur on function entry/exits. 29k and SPARC's register windows were attempts at avoiding those).
- FullyFunctional 6y agoI failed to add that the stores aren't eliminated by this either so we are also incurring increased memory traffic unnecessarily.
- jcranmer 6y agoWe're talking about stores to the stack, which is likely to not be used by other threads/processors, so all of the values are being modified in a cache entry helpfully held in the Modified state and incurring no bus traffic. It will use up the traffic to/from the cache, though.
- FullyFunctional 6y agoYes I did mean cache traffic, poor choice of words, but the point is the same (filling up the store buffers etc).