4 ms·
A good design + a 1 node (15% transistor level benefit) advantage + embedded(ish) HBM. You kind of expect 15-30% benefit in the same design. Whether CPU or band
by brennanpeterson 6y ago
A good design + a 1 node (15% transistor level benefit) advantage + embedded(ish) HBM. You kind of expect 15-30% benefit in the same design. Whether CPU or bandwidth bound. Some latency bound benchmarks will be at par.
It is a perfect hit on all cylinders: a good design, a node advantage, and better memory.
This has happened before. We have been at a recent lull in performance, but annual performance increases used to be about 30%.
- floatboth 6y agoWhere did you find HBM? The mock-up picture they showed at the event clearly shows two traditional DDR style chips (encased in their own plastic with white text on it) on the package. This is absolutely not how HBM looks like, HBM is bare die stacks connected to the processor die with an interposer. Also HBM would've made it significantly more expensive.
- dragontamer 6y agoThere is a European site (swedish? Danish?) That mistranslated this information. And then the information came full circle back into english.
- brennanpeterson 6y agoYou are right, I misread 'high bandwidth' as HBM. I was surprised at the cost as well.