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I'm not so convinced that x86 really had an architectural advantage. What Intel had was an enormous volume advantage, which allowed them to throw more resources
by microtherion 6y ago
I'm not so convinced that x86 really had an architectural advantage. What Intel had was an enormous volume advantage, which allowed them to throw more resources at their designs than the competition.
In fact, Intel had such an advantage that they managed to bet on a completely failed architecture (Itanium) for more than a decade and not only maintain market position but knock out most RISC architectures during the time.
- gpderetta 6y agox86 doesn't have indirect references. Apparently in ~1995 it was to hard to build an OoO engine that could deal with those. Intel just about manged to bolt OoO on x86 while VAX and 680x0 died. AMD also managed to do it in 1996, so it was not just about resources.
- microtherion 6y agoCan you explain what exactly you mean with "indirect references" here? Edit: To clarify my question — to the best of my knowledge, while the VAX had a higher level of indirection of indirection in instructions than the x86, the 68K has exactly the same level of indirection.
- jcranmer 6y agoSome architectures have instructions such as LDI imm that load MEM[MEM[imm]]--indirect memory references.
- gpderetta 6y agoI have little knowledge of 68k, but I understand that memory indirect addressing will deference its operand twice [1]. [1] https://en.wikibooks.org/wiki/68000_Assembly#Indirect_addressing https://en.wikibooks.org/wiki/68000_Assembly#Indirect_addres...
- microtherion 6y agoAh yes, you & grandparent are right, I had forgotten about the existence of these modes.
- jcranmer 6y agoLinus has apparently argued that x86 really did have an architectural advantage: https://yarchive.net/comp/linux/x86.html https://yarchive.net/comp/linux/x86.html. The argument here is that the CISC nature of x86 forced Intel to innovate microarchitecturally, and those microarchitectural innovations were more important for performance than the RISCy bits that x86 didn't adapt. I'm not sure I completely buy into the reasoning, but I do believe that Intel (accidentally!) ended up with an architecture that compromised well between RISC and CISC ideas. When they tried to build a shiny RISC architecture, what we got was Itanium, which turned out to be a disaster in no small part because the sufficiently-smart-compiler ideas underlying RISC definitely didn't work out.
- microtherion 6y agoLinus' own career illustrates my point, I think: Transmeta had advantages in low power design at one point, then Intel simply threw more resources at the problem. > When [Intel] tried to build a shiny RISC architecture, what we got was Itanium, which turned out to be a disaster That was a shiny VLIW architecture, more or less. The shiny RISC disaster was the 860. And they also had the 432, a fancy CISC disaster, to their name.