3 ms·
18 GB on-chip SRAM (at L1 latency), they say on the homepage. Looks like RAM with local compute. Another startup is sort of doing this (Arm cores etched in the
by BenoitP 6y ago
18 GB on-chip SRAM (at L1 latency), they say on the homepage.
Looks like RAM with local compute. Another startup is sort of doing this (Arm cores etched in the usual DRAM silicon process [1]). I wonder if this is a long term trend in computing. It does brings a whole new meaning to "getting the code to the data".
Also, the way to program it seems like it is very rough and constraining. I wonder how our current cushy languages and runtimes would (could?) adapt to that architecture. Would OpenMP even fit the job?
[1] https://www.upmem.com/ https://www.upmem.com/
- jasonwatkinspdx 6y agoSo this thing is programmed via Tensorflow, Torch, etc. Your model becomes a graph in an IR format that their toolchain maps onto a set of kernels, compiling new kernels as needed to cover the graph.