>> I know they were one of the earliest investors in ASML’s EUV. They may have been one of the earliest investors in EUV (along with TSMC, by the way), but in

>> I know they were one of the earliest investors in ASML’s EUV. They may have been one of the earliest investors in EUV (along with TSMC, by the way), but in terms of adoption and roadmap they have been way behind both TSMC and Samsung. I don't know the exact numbers of machines but my educated guess is that TSMC and Samsung together probably have close to 10x the EUV wafer capacity compared to Intel. And have had it for much longer as well. The problem Intel created for itself is that they have always had a very stubborn over-confidence in their own knowledge of process technology, and have driven tool manufacturers like ASML to work within Intels constraints, instead of working together to alleviate them. Their hubris has bitten them now that EUV has become economically viable compared to Intels process technology that relies heavily on triple and quadruple patterning, and very little of Intels 'old' process technology knowledge carries over to EUV. TSMC has also had a lot of teething pains with EUV but they have been very determined to make it work, and that's paying off now.