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Oh hey, I was just playing with this... it's really cool! There's a "Linux on LiteX-VexRiscv" design [1] that adds a DDR controller and MMU to the shared bus a
by ohazi 6y ago
Oh hey, I was just playing with this... it's really cool!
There's a "Linux on LiteX-VexRiscv" design [1] that adds a DDR controller and MMU to the shared bus as well as a handful of other pieces that allow you to boot a Linux kernel image, mount a filesystem, and get a shell prompt over a serial terminal or ssh.
You can then use familiar interfaces to talk to whatever peripherals you decided to include, e.g.:
$ echo 1 > /sys/class/gpio/gpio508/value
$ echo 50 > /sys/class/pwm/pwmchip0/duty_cycle
I got it to run on Greg Davill's [2] Orange Crab FPGA board [3] last night, which was actually pretty easy, as it's one of the supported boards. It was surprisingly usable, even with the soft processor only running at 64 MHz. This was also the first time I used the open source synthesis / place-and-route tools to do anything more complicated than an adder, and they were fast and worked flawlessly.
[1] https://github.com/litex-hub/linux-on-litex-vexriscv https://github.com/litex-hub/linux-on-litex-vexriscv
[2] https://twitter.com/gregdavill https://twitter.com/gregdavill - He posts a lot of really cool macro and microscope photos of electronics assembly
[3] https://github.com/gregdavill/OrangeCrab https://github.com/gregdavill/OrangeCrab