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DVI is a very large spec. It supports everything from pure VGA over it's analog pins as well as full fledged HDMI (its actually the other way around, HDMI is se

DVI is a very large spec. It supports everything from pure VGA over it's analog pins as well as full fledged HDMI (its actually the other way around, HDMI is secretly just DVI). Finding monitors which support all of the simpler modes is an issue, whereas finding monitors which support old school VGA is fairly easy.

garaetjjte 6y ago
>its actually the other way around, HDMI is secretly just DVI HDMI signalling is actually extension of DVI, it embeds TERC4 data islands containing extra metadata and PCM audio during blanking interval. (yes, I was surprised at beginning but HDMI/DVI also have blanking periods just as VGA) https://warmcat.com/hardware%20design/hdmi/fpga/2015/10/21/hdmi-capture-and-analysis-fpga-project-2.html https://warmcat.com/hardware%20design/hdmi/fpga/2015/10/21/h...
- deelowe 6y ago
  Thank you! I've been looking for something like this for ages. It's extremely difficult to find decent resources on the hdmi/dvi protocol.
  - garaetjjte 6y ago
    hamsterworks VHDL implementation might be also useful: https://web.archive.org/web/20190520020308/http://hamsterworks.co.nz/mediawiki/index.php/Minimal_DVI-D https://web.archive.org/web/20190520020308/http://hamsterwor... https://web.archive.org/web/20190520020602/http://hamsterworks.co.nz/mediawiki/index.php/Minimal_HDMI https://web.archive.org/web/20190520020602/http://hamsterwor...
  - Koshkin 6y ago
    Wikipedia has a link to this: https://web.archive.org/web/20120813201146/http://www.ddwg.org/lib/dvi_10.pdf https://web.archive.org/web/20120813201146/http://www.ddwg.o...
- londons_explore 6y ago
  It's a "barely digital" standard. It doesn't have any error detection or correction. The timing of the signal is still based on CRT TV's. Really the whole lot should be done away with and replaced with something properly bidirectional, and preferably IP based so it can be routed anywhere.
  - garaetjjte 6y ago
    I think DisplayPort done away with this legacy and uses packetized transmission.
    - rasz 6y ago
      Packets that still have to encode and adhere to strict VGA timings (Hsync/Vsync/blanking), and you arent allowed to send anything useful between the packets unless its a blanking period.

garaetjjte 6y ago

>its actually the other way around, HDMI is secretly just DVI HDMI signalling is actually extension of DVI, it embeds TERC4 data islands containing extra metadata and PCM audio during blanking interval. (yes, I was surprised at beginning but HDMI/DVI also have blanking periods just as VGA) https://warmcat.com/hardware%20design/hdmi/fpga/2015/10/21/hdmi-capture-and-analysis-fpga-project-2.html https://warmcat.com/hardware%20design/hdmi/fpga/2015/10/21/h...

deelowe 6y ago
Thank you! I've been looking for something like this for ages. It's extremely difficult to find decent resources on the hdmi/dvi protocol.
- garaetjjte 6y ago
  hamsterworks VHDL implementation might be also useful: https://web.archive.org/web/20190520020308/http://hamsterworks.co.nz/mediawiki/index.php/Minimal_DVI-D https://web.archive.org/web/20190520020308/http://hamsterwor... https://web.archive.org/web/20190520020602/http://hamsterworks.co.nz/mediawiki/index.php/Minimal_HDMI https://web.archive.org/web/20190520020602/http://hamsterwor...
- Koshkin 6y ago
  Wikipedia has a link to this: https://web.archive.org/web/20120813201146/http://www.ddwg.org/lib/dvi_10.pdf https://web.archive.org/web/20120813201146/http://www.ddwg.o...
londons_explore 6y ago
It's a "barely digital" standard. It doesn't have any error detection or correction. The timing of the signal is still based on CRT TV's. Really the whole lot should be done away with and replaced with something properly bidirectional, and preferably IP based so it can be routed anywhere.
- garaetjjte 6y ago
  I think DisplayPort done away with this legacy and uses packetized transmission.
  - rasz 6y ago
    Packets that still have to encode and adhere to strict VGA timings (Hsync/Vsync/blanking), and you arent allowed to send anything useful between the packets unless its a blanking period.