6 ms·

But also Lattice doesn't produce FPGAs nearly as powerful as Xilinx Ultrascale. So it's not like people are free to choose whatever. Plus, as the number of gate

by oytis 6y ago

But also Lattice doesn't produce FPGAs nearly as powerful as Xilinx Ultrascale. So it's not like people are free to choose whatever. Plus, as the number of gates and other elements gets larger, sophisticated software with a lot of domain knowledge becomes more important - probably that's why Xilinx and Altera are not rushing with open source support.

UncleOxidant 6y ago
True, but I'm about to start an FPGA contract where a Lattice FPGA would be a good fit. Doesn't need a huge amount of gates and performance would be just fine. There are a lot of designs that can fit in that design envelope.
- bcrl 6y ago
  Lattice seems to do quite well in the small and affordable market segment. There are lots of interesting products using them at astoundingly cheap price points. https://hackaday.com/2020/01/24/new-part-day-led-driver-is-fpga-dev-board-in-disguise/ https://hackaday.com/2020/01/24/new-part-day-led-driver-is-f... is probably the most affordable FPGA board that has been fully reverse engineered with 2 x gigabit ethernet ports and SDRAM.
bsder 6y ago
The mega-FPGA's are irrelevant to the consumer and small business segment. Sure, the guys doing software defined radio need beefy FPGAs (but, even they're starting to use much lower class ones). However, over the past 20 years, the things I have seen small businesses use FPGAs for rarely stresses the FPGA fabric even slightly. Only a single company managed to actually fill an FPGA that we had to bump to the next class of the same family. Mostly the usages are just: 1) extra pins to control/sequence "stuff" or 2) one single latency sensitive thing or 3) ADC communication. I'm struggling to think of any company I did work for that was outside those applications--"safety lockout" would probably count. Back in the days of 8-bit micros (yeah ... I'm old), you would probably offload the PID control loops so they didn't clog your micro. Nowadays, microcontrollers are so powerful and FPGAs are so annoying to program that you're better off shunting as much as you can into the micro and minimizing the FPGA. > Plus, as the number of gates and other elements gets larger, sophisticated software with a lot of domain knowledge becomes more important I'm going to call this out. I simply don't believe it. The publications of Xilinx and Altera (when there are any) simply look like the same algorithms from 20+ years ago but with Moore's Law applied to them. FPGA tools still suck at anything that looks like a "datapath".

by oytis 6y ago

UncleOxidant 6y ago

True, but I'm about to start an FPGA contract where a Lattice FPGA would be a good fit. Doesn't need a huge amount of gates and performance would be just fine. There are a lot of designs that can fit in that design envelope.

bcrl 6y ago
Lattice seems to do quite well in the small and affordable market segment. There are lots of interesting products using them at astoundingly cheap price points. https://hackaday.com/2020/01/24/new-part-day-led-driver-is-fpga-dev-board-in-disguise/ https://hackaday.com/2020/01/24/new-part-day-led-driver-is-f... is probably the most affordable FPGA board that has been fully reverse engineered with 2 x gigabit ethernet ports and SDRAM.

bsder 6y ago

The mega-FPGA's are irrelevant to the consumer and small business segment. Sure, the guys doing software defined radio need beefy FPGAs (but, even they're starting to use much lower class ones). However, over the past 20 years, the things I have seen small businesses use FPGAs for rarely stresses the FPGA fabric even slightly. Only a single company managed to actually fill an FPGA that we had to bump to the next class of the same family. Mostly the usages are just: 1) extra pins to control/sequence "stuff" or 2) one single latency sensitive thing or 3) ADC communication. I'm struggling to think of any company I did work for that was outside those applications--"safety lockout" would probably count. Back in the days of 8-bit micros (yeah ... I'm old), you would probably offload the PID control loops so they didn't clog your micro. Nowadays, microcontrollers are so powerful and FPGAs are so annoying to program that you're better off shunting as much as you can into the micro and minimizing the FPGA. > Plus, as the number of gates and other elements gets larger, sophisticated software with a lot of domain knowledge becomes more important I'm going to call this out. I simply don't believe it. The publications of Xilinx and Altera (when there are any) simply look like the same algorithms from 20+ years ago but with Moore's Law applied to them. FPGA tools still suck at anything that looks like a "datapath".