Some context on the machine most of these authors worked on would probably help. Fugaku has two really important features: Stacks of HBM on die, and the Scalab

Some context on the machine most of these authors worked on would probably help. Fugaku has two really important features: Stacks of HBM on die, and the Scalable Vector Extensions. HBM is used by gpus as well. This gives A64FX comparable raw bandwidth even if the programming model is different. The SVE design is more general purpose than other short vector extensions. It abstracts over lane width / number of lanes at the binary level, and has some bypassing features similar to the old Cray machines that again have the effect of delivering massive bandwidth. The result of this is that A64FX is competitive with GPUs on most HPC workloads, but with a single chip, single programming architecture, and lower overall power consumption. So I'd interpret the author's comments in that context. It's not so much about adding SIMD as a bad idea, but the specifics of how that needs to be implemented, and whether a dedicated coprocessor with a wholly different programming model makes sense vs well designed vector extensions backed by a high bandwidth memory subsystem.