Yes, I missed the edit, I was only commenting on the first part. Quite a few things determine whether a fusion is doable or not. In addition to the number of d

Yes, I missed the edit, I was only commenting on the first part. Quite a few things determine whether a fusion is doable or not. In addition to the number of destination registers, you do, to a more relaxed extent, care about source operands, but also things like ‘does this fit nicely in a single pass through the pipeline?’ and even just ‘is this materially beneficial?’ Lots of cores (but not all) can write two registers from a fused instruction, given the right conditions, and sov does rerun the addition, so add-sov fusion sounds very doable to me.