4 ms·
At least in their papers and mailing list discussion, the limit for simple fusion is not on the number of source operands, but on the number of destination oper
by brandmeyer 6y ago
At least in their papers and mailing list discussion, the limit for simple fusion is not on the number of source operands, but on the number of destination operands. A classic example is a PC-relative long jump:
auipc lr, zero, .LONG_TARGET20
jalr lr, lr, .LONG_TARGET12
Only one register (the link register) is clobbered, so the pair can be fused into a single wide jump-and-link.
So in parent's example, sov might fuse with the following bnez, but it likely wouldn't fuse with the preceding addition.
- Veedrac 6y agoYes, I missed the edit, I was only commenting on the first part. Quite a few things determine whether a fusion is doable or not. In addition to the number of destination registers, you do, to a more relaxed extent, care about source operands, but also things like ‘does this fit nicely in a single pass through the pipeline?’ and even just ‘is this materially beneficial?’ Lots of cores (but not all) can write two registers from a fused instruction, given the right conditions, and sov does rerun the addition, so add-sov fusion sounds very doable to me.