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Do any other ISAs have compressed encodings in wide use? It seems a bit like a chicken and egg problem - why build all the silicon to handle decoding it if your
by anp 6y ago
Do any other ISAs have compressed encodings in wide use? It seems a bit like a chicken and egg problem - why build all the silicon to handle decoding it if your base ISA is dense enough?
- darknoon 6y agoSounds pretty similar to thumb mode on ARM, no?
- mark_mcs 6y agoAnd ARM licensed the Hitachi SuperH patents when implementing Thumb. It's not exactly a new concept.
- deleted 6y ago[deleted]
- loeg 6y agoARM had Thumb, right? Is that a deadend at this point?
- deaddodo 6y agoThumb was removed from ARMv8 (AArch64). If you use 32-but legacy, it may exist on some chips; but it’s no longer the benefit it once was.
- hajile 6y agoIt's always been of the same value. You exchange performance for code density. They want aarch64 to be high-performance, so they removed thumb. RISC-V compact instructions don't require special modes and run in fully-mixed mode with 32-bit instructions without all the penalties thumb has (they are literally just extended into their 32-bit counterparts internally).
- deaddodo 6y ago> It's always been of the same value. You exchange performance for code density. High code density became less valuable, was the point.
- pizlonator 6y agoArguably x86 only has a compressed encoding in the sense that super common instructions often fit in fewer than 4 bytes and some of the most used ones are 1 byte. I don’t think the compression is deliberate or optimal though.
- fulafel 6y agoIn addition to Thumb there are apparently at least MIPS16e ASE and PowerPC VLE.