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All this Thumb etc. stuff is not relevant to the 64-bit world though. AArch64 is the least fragmented of the big ISAs, with a solid list of base functionality —
by floatboth 6y ago
All this Thumb etc. stuff is not relevant to the 64-bit world though. AArch64 is the least fragmented of the big ISAs, with a solid list of base functionality — e.g. NEON is guaranteed to exist on everything.
- plorkyeran 6y agoThat's mostly because it's new and hasn't had time to fragment. NEON everywhere is great, but eventually there's going to be a NEON 2 that obviously will only exist on newer chips. People seem to generally regard thumb encodings as a mistake so we probably won't get a repeat of that, but I'd be shocked if similar divergences don't develop over the years.
- cesarb 6y ago> but eventually there's going to be a NEON 2 that obviously will only exist on newer chips. Isn't it SVE? So far, it has been only implemented AFAIK by the A64FX, which is used by the current #1 supercomputer in the TOP500 list, but it wouldn't surprise me if we start seeing it on newer 64-bit ARM chips.
- brandmeyer 6y agoARMv8 is 8 years old at this point. RISC-V's 2.2 (final, stable) ISA came out in 2017 and its already fragmented.
- Symmetry 6y agoThumb is very useful in things like microwaves where using less memory save the manufacturer a little money. You do have different chips with different instructions but in a very regularized way. An ARM v8.2-A chip is going to have the same instructions whether it's made by ARM, Samsung, or Apple. And when v9 comes out they'll have NEON's SVE replacement everywhere and you'll be able to use the same code regardless of whether the SIMD width is 128 bits or 512.
- ksec 6y agoIs that SVE on ARM v9 confirmed? I have yet to see any concrete details on ARM v9, generally speaking ARM v8 is pretty damn well designed I am wondering what v9 will look like.
- skavi 6y agoIt’s generally expected that SVE2 will be required for ARMv9. SVE2 is a more logical successor to NEON than SVE. https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/new-technologies-for-the-arm-a-profile-architecture https://community.arm.com/developer/ip-products/processors/b...
- brucehoult 6y agoNEON is guaranteed to exist on everything, and this means you're never going to see Aarch64 replace the Cortex M0 and M3. That's fragmentation right there. Severe fragmentation. Two completely incompatible ISAs. Small 32 bit RISC-V comes in smaller and lower power than An M0, and small 64 bit RISC-V is not much bigger than an M0 and is rather popular controlling something in the corner of a larger 64 bit SoC.