5 ms·
OK, I understand. The approach works even better if you multiply by 10: int16_t celsius2fahrenheit10(int16_t c) { int16_t f = 0; f += c << 4;
by beeforpork 6y ago
OK, I understand. The approach works even better if you multiply by 10:
int16_t celsius2fahrenheit10(int16_t c)
{
int16_t f = 0;
f += c << 4;
f -= c;
f -= c >> 1;
f -= c >> 3;
f += c >> 5;
f += 320 * 8;
f >>= 3;
return f;
}
This is really accurate:
C=0 (int 0) F=32 (int: 320, exact: 32)
C=15.3 (int 153) F=59.5 (int: 595, exact: 59.54)
C=37 (int 370) F=98.6 (int: 986, exact: 98.6)
C=100 (int 1000) F=212 (int: 2120, exact: 212)
- noexani 6y agoIt's really interesting to see that it could be done like that, but, that pseudo code you've given me would translate to a heck of a lot of MCS-48 instructions! 16-bit subtraction in particular is really expensive. Potentially not much gain there?
- beeforpork 6y agoBut you do have CPL -- that does not help? Anyway, without subtraction, you could do the very same with one additional add: int16_t celsius2fahrenheit(int16_t c) { int16_t f = 0; f += c << 1; f += c << 2; f += c << 3; f += c >> 2; f += c >> 3; f += c >> 5; f += 320 * 8; f >>= 3; return f; }
- beeforpork 6y agoThis is the same code in MCS48 assembly. Or so I hope. ; INPUT: r1:r0 celsius * 10 ; OUTPUT: r3:r2 fahrenheit * 10 MOV A, r0 ADD A, r0 MOV r2, A MOV r4, A MOV A, r1 RLC A MOV r3, A MOV r5, A MOV A, r4 ADD A, r4 XCH A, r5 RLC A MOV r4, A MOV A, r2 ADD A, r5 XCH A, r3 ADDC A, r4 MOV r2, A MOV A, r5 ADD A, r5 XCH A, r4 RLC A MOV r5, A MOV A, r3 ADD A, r4 XCH A, r2 ADDC A, r5 MOV r3, A MOV A, r1 ADD A, r1 MOV A, r1 RRC A MOV r5, A MOV A, r0 RRC A MOV r4, A MOV A, r5 ADD A, r5 MOV A, r5 RRC A XCH A, r4 RRC A MOV r5, A MOV A, r2 ADD A, r5 XCH A, r3 ADDC A, r4 MOV r2, A MOV A, r4 ADD A, r4 MOV A, r4 RRC A XCH A, r5 RRC A MOV r4, A MOV A, r3 ADD A, r4 XCH A, r2 ADDC A, r5 MOV r3, A MOV A, r5 ADD A, r5 MOV A, r5 RRC A XCH A, r4 RRC A MOV r5, A MOV A, r4 ADD A, r4 MOV A, r4 RRC A XCH A, r5 RRC A MOV r4, A MOV A, r2 ADD A, r4 XCH A, r3 ADDC A, r5 ADD A, 10 MOV r2, A ADD A, r2 MOV A, r2 RRC A XCH A, r3 RRC A MOV r2, A MOV A, r3 ADD A, r3 MOV A, r3 RRC A XCH A, r2 RRC A MOV r3, A MOV A, r2 ADD A, r2 MOV A, r2 RRC A XCH A, r3 RRC A MOV r2, A