PowerPC had support for block address translation, which provides a handful of registers to specify translations for variable-sized blocks, which is close-ish t

PowerPC had support for block address translation, which provides a handful of registers to specify translations for variable-sized blocks, which is close-ish to what you have in mind (though very limited), in addition to an inverted page table. More recent revisions of the architecture (POWER9) have shifted towards a more typical radix page table.