According to the diagram of the output buffer on pdf page 15, they pull down against Vdd (the negative supply). What is left unstated is that the pulldown tran

According to the diagram of the output buffer on pdf page 15, they pull down against Vdd (the negative supply). What is left unstated is that the pulldown transistor has likely been designed with a Vt such that when "on", and pulling down against Vdd, the output goes quite close to zero volts.