5 ms·

I love these posts and I could probably ask a thousand questions. I'll constrain myself to just... a couple. :) Does the 8008 get ground internally or does th

by egsmi 6y ago

I love these posts and I could probably ask a thousand questions. I'll constrain myself to just... a couple. :) Does the 8008 get ground internally or does the IO just drive Vdd (-9V) as the low level? The data sheet you linked to has no min for Vol so I am guessing that it does but it seems like that would make interfacing to peripheral ICs kind of annoying (assuming TTL levels). All the pinouts I found online [1] have no ground pin so I must be missing something obvious, right? [1] http://www.cpu-galerie.de/html/intel8008-m8008.html http://www.cpu-galerie.de/html/intel8008-m8008.html

pwg 6y ago
You can grab a copy of the 8008 User Manual here: https://www.manualslib.com/manual/943056/Intel-8008.html https://www.manualslib.com/manual/943056/Intel-8008.html The 'download' link works, after possibly answering a google image captcha. On pdf page 2 the "features" says the I/O lines are TTL compatible. On pdf page 15 begins the "electrical specifications" section, and it looks like they just pull the outputs down against Vdd with a MOS transistor (see "Output Buffer" diagram in figure 7).
- egsmi 6y ago
  Thanks! The pin out on page 2 has no ground, so what are they pulling down to? That’s my question. I can imagine a couple of ways to do make the TTL levels so I’m curious which way it was actually done.
  - pwg 6y ago
    According to the diagram of the output buffer on pdf page 15, they pull down against Vdd (the negative supply). What is left unstated is that the pulldown transistor has likely been designed with a Vt such that when "on", and pulling down against Vdd, the output goes quite close to zero volts.
egsmi 6y ago
It just dawned on me that you could use the Vol=Vdd-Vt property of the inverter to level shift up the IO output closer to ground. Especially if one did a circuit that did Vol=Vdd-2Vt one could get a low output that’s pretty close to ground. Is that what they did?
- kens 6y ago
  The output pins are pulled to Vdd (-9) by a transistor driven by a bootstrap load circuit. So you'll lose one threshold voltage, not two. (You can see these bootstrap load capacitors in the die photo near the pads.) Inconveniently, the 8008 datasheet doesn't specify how low the low outputs are; it just says they are at most 0.4 volts.
  - egsmi 6y ago
    Thanks for the information. It so cool that you can just examine the die and know the answer. There are definitely trade offs to consider so I can understand why the Intel engineers took that route. On the one hand, one gets a very negative output level, which I suppose no one really cares about in the 70s so maybe that’s not even a disadvantage. But to level shift more toward ground would consume more die area per IO and increase the output impedance of the pin, unless one did another buffer stage, which would be even more die area. It’s interesting how we can just absorb this extra complexity in modern circuits without even batting an eye. It’s barely even considered as extra complexity.
kens 6y ago
It's a bit tricky. From the 8008's perspective, it's running on -14 volts. But the 8008's Vcc (i.e ground) is connected to +5V, and the Vdd is connected to -9V. So when the 8008 outputs a 1 (high), the output is +5V (more or less), which is TTL-compatible. When the 8008 outputs a 0 (low), the output will be negative. Apparently, TTL is fine with negative input voltages, so this is acceptable. The point is by shifting the 8008's supply to +5V/-9V and ignoring ground, the outputs automatically work with TTL.
- egsmi 6y ago
  Interesting, I thought TTL didn’t like voltages that were too negative but I’m definitely not too great on the historical stuff. This data sheet for 7400 logic, which admittedly only goes back to 1983, doesn’t like inputs below -1.5V That could very likely be because ESD protection was added and 1970 TTL parts didn’t have that. https://www.jameco.com/jameco/products/prodds/910901.pdf https://www.jameco.com/jameco/products/prodds/910901.pdf
- userbinator 6y ago
  Due to the threshold voltage, the low will be quite close to 0V. A TTL input is the emitter of a transistor, so trying to pull it slightly negative won't do any harm; and if anything, may actually help the transition be a bit sharper: https://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#Fundamental_TTL_gate https://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_...
- egsmi 6y ago
  I'm a little slow today. There was an article about a month ago on the Sac State 8008 and it had a link to the user manual which contained a high level schematic of that computer. Sync goes straight into a TTL inverter. So ya, TTL, of 1972 vintage anyway, didn't seem to mind -9V as an input. https://news.ycombinator.com/item?id=24515156 https://news.ycombinator.com/item?id=24515156 Figure 10 shows how the interfacing of that machine worked. http://www.digibarn.com/stories/bill-pentz-story/docs/8008UM.pdf http://www.digibarn.com/stories/bill-pentz-story/docs/8008UM...

by egsmi 6y ago

pwg 6y ago

You can grab a copy of the 8008 User Manual here: https://www.manualslib.com/manual/943056/Intel-8008.html https://www.manualslib.com/manual/943056/Intel-8008.html The 'download' link works, after possibly answering a google image captcha. On pdf page 2 the "features" says the I/O lines are TTL compatible. On pdf page 15 begins the "electrical specifications" section, and it looks like they just pull the outputs down against Vdd with a MOS transistor (see "Output Buffer" diagram in figure 7).

egsmi 6y ago
Thanks! The pin out on page 2 has no ground, so what are they pulling down to? That’s my question. I can imagine a couple of ways to do make the TTL levels so I’m curious which way it was actually done.
- pwg 6y ago
  According to the diagram of the output buffer on pdf page 15, they pull down against Vdd (the negative supply). What is left unstated is that the pulldown transistor has likely been designed with a Vt such that when "on", and pulling down against Vdd, the output goes quite close to zero volts.

egsmi 6y ago

It just dawned on me that you could use the Vol=Vdd-Vt property of the inverter to level shift up the IO output closer to ground. Especially if one did a circuit that did Vol=Vdd-2Vt one could get a low output that’s pretty close to ground. Is that what they did?

kens 6y ago
The output pins are pulled to Vdd (-9) by a transistor driven by a bootstrap load circuit. So you'll lose one threshold voltage, not two. (You can see these bootstrap load capacitors in the die photo near the pads.) Inconveniently, the 8008 datasheet doesn't specify how low the low outputs are; it just says they are at most 0.4 volts.
- egsmi 6y ago
  Thanks for the information. It so cool that you can just examine the die and know the answer. There are definitely trade offs to consider so I can understand why the Intel engineers took that route. On the one hand, one gets a very negative output level, which I suppose no one really cares about in the 70s so maybe that’s not even a disadvantage. But to level shift more toward ground would consume more die area per IO and increase the output impedance of the pin, unless one did another buffer stage, which would be even more die area. It’s interesting how we can just absorb this extra complexity in modern circuits without even batting an eye. It’s barely even considered as extra complexity.

kens 6y ago

It's a bit tricky. From the 8008's perspective, it's running on -14 volts. But the 8008's Vcc (i.e ground) is connected to +5V, and the Vdd is connected to -9V. So when the 8008 outputs a 1 (high), the output is +5V (more or less), which is TTL-compatible. When the 8008 outputs a 0 (low), the output will be negative. Apparently, TTL is fine with negative input voltages, so this is acceptable. The point is by shifting the 8008's supply to +5V/-9V and ignoring ground, the outputs automatically work with TTL.

egsmi 6y ago
Interesting, I thought TTL didn’t like voltages that were too negative but I’m definitely not too great on the historical stuff. This data sheet for 7400 logic, which admittedly only goes back to 1983, doesn’t like inputs below -1.5V That could very likely be because ESD protection was added and 1970 TTL parts didn’t have that. https://www.jameco.com/jameco/products/prodds/910901.pdf https://www.jameco.com/jameco/products/prodds/910901.pdf
userbinator 6y ago
Due to the threshold voltage, the low will be quite close to 0V. A TTL input is the emitter of a transistor, so trying to pull it slightly negative won't do any harm; and if anything, may actually help the transition be a bit sharper: https://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#Fundamental_TTL_gate https://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_...
egsmi 6y ago
I'm a little slow today. There was an article about a month ago on the Sac State 8008 and it had a link to the user manual which contained a high level schematic of that computer. Sync goes straight into a TTL inverter. So ya, TTL, of 1972 vintage anyway, didn't seem to mind -9V as an input. https://news.ycombinator.com/item?id=24515156 https://news.ycombinator.com/item?id=24515156 Figure 10 shows how the interfacing of that machine worked. http://www.digibarn.com/stories/bill-pentz-story/docs/8008UM.pdf http://www.digibarn.com/stories/bill-pentz-story/docs/8008UM...