6 ms·

Author here for all your 8008 questions :-)

by kens 6y ago

myself248 6y ago
In "The diagram below shows the bootstrap load circuit.", you use Q1/Q2/Q3 designations but these aren't labeled in the diagram. Also can you explain a little more about the "load resistor (which is actually a transistor)"? It looks like this is actually a current sink or something?
- kens 6y ago
  Thanks for letting me know! I've updated the diagram with the right version. Yes, the transistor is a current sink. Since the gate is wired to Vdd, the transistor is stuck on so it provides a fixed current limited by its size. Transistors are much smaller than resistors on an IC so they used transistors instead of resistors.
  - a1369209993 6y ago
    > Yes, the transistor is a current sink. Since the gate is wired to Vdd, the transistor is stuck on so it provides a fixed current limited by its size. That seems wrong? Q3 appears to be effectively acting as a diode with cathode fixed at -9V and a 5V threshold, such that Q2's gate (Q3's anode) can never be above -4V, but will be pulled lower by the capacitor if `out` drops. (At which point Q3 doesn't provide any current because its anode is down at -18V.)
    - kens 6y ago
      I was answering the question about the load transistor in the earlier inverter diagram, not Q3. I mention Q3's diode action in footnote 5.
      - a1369209993 6y ago
        Ah. That makes sense, then.
h2odragon 6y ago
Thanks for going to such lengths to share your joy with us.
justin66 6y ago
Amazing stuff, as always.
egsmi 6y ago
I love these posts and I could probably ask a thousand questions. I'll constrain myself to just... a couple. :) Does the 8008 get ground internally or does the IO just drive Vdd (-9V) as the low level? The data sheet you linked to has no min for Vol so I am guessing that it does but it seems like that would make interfacing to peripheral ICs kind of annoying (assuming TTL levels). All the pinouts I found online [1] have no ground pin so I must be missing something obvious, right? [1] http://www.cpu-galerie.de/html/intel8008-m8008.html http://www.cpu-galerie.de/html/intel8008-m8008.html
- pwg 6y ago
  You can grab a copy of the 8008 User Manual here: https://www.manualslib.com/manual/943056/Intel-8008.html https://www.manualslib.com/manual/943056/Intel-8008.html The 'download' link works, after possibly answering a google image captcha. On pdf page 2 the "features" says the I/O lines are TTL compatible. On pdf page 15 begins the "electrical specifications" section, and it looks like they just pull the outputs down against Vdd with a MOS transistor (see "Output Buffer" diagram in figure 7).
  - egsmi 6y ago
    Thanks! The pin out on page 2 has no ground, so what are they pulling down to? That’s my question. I can imagine a couple of ways to do make the TTL levels so I’m curious which way it was actually done.
    - pwg 6y ago
      According to the diagram of the output buffer on pdf page 15, they pull down against Vdd (the negative supply). What is left unstated is that the pulldown transistor has likely been designed with a Vt such that when "on", and pulling down against Vdd, the output goes quite close to zero volts.
- egsmi 6y ago
  It just dawned on me that you could use the Vol=Vdd-Vt property of the inverter to level shift up the IO output closer to ground. Especially if one did a circuit that did Vol=Vdd-2Vt one could get a low output that’s pretty close to ground. Is that what they did?
FullyFunctional 6y ago
Ken, thanks for yet-another amazing and dense article. Somewhat off topic, but you have written about four-phase logic and AL1 in particular (eg. http://www.righto.com/2015/05/the-texas-instruments-tmx-1795-first.html http://www.righto.com/2015/05/the-texas-instruments-tmx-1795...) but I have yet to see a similar deep treatment of it. How did the technology compare and why didn't it get more attention?
- kens 6y ago
  I have a Four Phase chip that I'll write about at some point. (Not the AL1 arithmetic/logic chip, but an I/O chip.) I think the main reason that Four Phase's AL1 didn't get more attention is that the processor was used as part of a proprietary computer, so it didn't have much visibility. In comparison, the 8008 was sold as an individual product with extensive documentation and support (essentially creating the microcomputer industry). The other factor is that improvements in NMOS made four-phase logic the losing technology, so it was mostly forgotten.
  - FullyFunctional 6y ago
    Thanks, that makes sense. Maybe I should have asked differently: at the time of its introduction, it seemed like four phase logic (the technology) ought to have had superior absolute performance and even performance/area. It seems like a static version of Intrinsity's Fast14. EDIT: clarified that "it" is the logic approach, not the end product.
    - kens 6y ago
      My impression is that in 1967 four phase logic was the superior approach, but by the 1970s technology had changed enough that it wasn't. The problem is how to implement the pull-up on your gates. The four phase approach precharged the gates using 4 different clock phases. This was fairly efficient since you just wasted one charge. In contrast, using a pull-up transistor meant that you had a constant current flow, wasting power. The disadvantage with four phase logic is that each gate level takes two clock cycles. If you use static logic, on the other hand, you have the propagation delay through the gates. Another disadvantage of four-phase logic was the more complex design. I think it also required one more transistor per gate. The main technology changes between 1967 and 1975 were the switch to silicon-gate transistors, the switch from PMOS to NMOS, and the use of depletion-load transistors. I think these considerably reduced the advantage of four-phase logic. The common microprocessors of that era (8080, 6502, Z-80, etc) used depletion-load NMOS logic, although the IMP-16 and TI TMS9900 apparently used four-phase logic. I'm currently looking at the Mostek 4116 memory chip which uses weird precharge logic, probably not four-phase, but I haven't figured out yet what's going on there. I've read some of the papers on four-phase logic, but haven't studied it closely enough to be sure of the above. So I welcome corrections and more information about the demise of four-phase logic.

Author here for all your 8008 questions :-)

by kens 6y ago

Author here for all your 8008 questions :-)

In "The diagram below shows the bootstrap load circuit.", you use Q1/Q2/Q3 designations but these aren't labeled in the diagram. Also can you explain a little more about the "load resistor (which is actually a transistor)"? It looks like this is actually a current sink or something?

kens 6y ago
Thanks for letting me know! I've updated the diagram with the right version. Yes, the transistor is a current sink. Since the gate is wired to Vdd, the transistor is stuck on so it provides a fixed current limited by its size. Transistors are much smaller than resistors on an IC so they used transistors instead of resistors.
- a1369209993 6y ago
  > Yes, the transistor is a current sink. Since the gate is wired to Vdd, the transistor is stuck on so it provides a fixed current limited by its size. That seems wrong? Q3 appears to be effectively acting as a diode with cathode fixed at -9V and a 5V threshold, such that Q2's gate (Q3's anode) can never be above -4V, but will be pulled lower by the capacitor if `out` drops. (At which point Q3 doesn't provide any current because its anode is down at -18V.)
  - kens 6y ago
    I was answering the question about the load transistor in the earlier inverter diagram, not Q3. I mention Q3's diode action in footnote 5.
    - a1369209993 6y ago
      Ah. That makes sense, then.

h2odragon 6y ago

Thanks for going to such lengths to share your joy with us.

justin66 6y ago

Amazing stuff, as always.

egsmi 6y ago

I love these posts and I could probably ask a thousand questions. I'll constrain myself to just... a couple. :) Does the 8008 get ground internally or does the IO just drive Vdd (-9V) as the low level? The data sheet you linked to has no min for Vol so I am guessing that it does but it seems like that would make interfacing to peripheral ICs kind of annoying (assuming TTL levels). All the pinouts I found online [1] have no ground pin so I must be missing something obvious, right? [1] http://www.cpu-galerie.de/html/intel8008-m8008.html http://www.cpu-galerie.de/html/intel8008-m8008.html

pwg 6y ago
You can grab a copy of the 8008 User Manual here: https://www.manualslib.com/manual/943056/Intel-8008.html https://www.manualslib.com/manual/943056/Intel-8008.html The 'download' link works, after possibly answering a google image captcha. On pdf page 2 the "features" says the I/O lines are TTL compatible. On pdf page 15 begins the "electrical specifications" section, and it looks like they just pull the outputs down against Vdd with a MOS transistor (see "Output Buffer" diagram in figure 7).
- egsmi 6y ago
  Thanks! The pin out on page 2 has no ground, so what are they pulling down to? That’s my question. I can imagine a couple of ways to do make the TTL levels so I’m curious which way it was actually done.
  - pwg 6y ago
    According to the diagram of the output buffer on pdf page 15, they pull down against Vdd (the negative supply). What is left unstated is that the pulldown transistor has likely been designed with a Vt such that when "on", and pulling down against Vdd, the output goes quite close to zero volts.
egsmi 6y ago
It just dawned on me that you could use the Vol=Vdd-Vt property of the inverter to level shift up the IO output closer to ground. Especially if one did a circuit that did Vol=Vdd-2Vt one could get a low output that’s pretty close to ground. Is that what they did?

FullyFunctional 6y ago

Ken, thanks for yet-another amazing and dense article. Somewhat off topic, but you have written about four-phase logic and AL1 in particular (eg. http://www.righto.com/2015/05/the-texas-instruments-tmx-1795-first.html http://www.righto.com/2015/05/the-texas-instruments-tmx-1795...) but I have yet to see a similar deep treatment of it. How did the technology compare and why didn't it get more attention?

kens 6y ago
I have a Four Phase chip that I'll write about at some point. (Not the AL1 arithmetic/logic chip, but an I/O chip.) I think the main reason that Four Phase's AL1 didn't get more attention is that the processor was used as part of a proprietary computer, so it didn't have much visibility. In comparison, the 8008 was sold as an individual product with extensive documentation and support (essentially creating the microcomputer industry). The other factor is that improvements in NMOS made four-phase logic the losing technology, so it was mostly forgotten.
- FullyFunctional 6y ago
  Thanks, that makes sense. Maybe I should have asked differently: at the time of its introduction, it seemed like four phase logic (the technology) ought to have had superior absolute performance and even performance/area. It seems like a static version of Intrinsity's Fast14. EDIT: clarified that "it" is the logic approach, not the end product.
  - kens 6y ago
    My impression is that in 1967 four phase logic was the superior approach, but by the 1970s technology had changed enough that it wasn't. The problem is how to implement the pull-up on your gates. The four phase approach precharged the gates using 4 different clock phases. This was fairly efficient since you just wasted one charge. In contrast, using a pull-up transistor meant that you had a constant current flow, wasting power. The disadvantage with four phase logic is that each gate level takes two clock cycles. If you use static logic, on the other hand, you have the propagation delay through the gates. Another disadvantage of four-phase logic was the more complex design. I think it also required one more transistor per gate. The main technology changes between 1967 and 1975 were the switch to silicon-gate transistors, the switch from PMOS to NMOS, and the use of depletion-load transistors. I think these considerably reduced the advantage of four-phase logic. The common microprocessors of that era (8080, 6502, Z-80, etc) used depletion-load NMOS logic, although the IMP-16 and TI TMS9900 apparently used four-phase logic. I'm currently looking at the Mostek 4116 memory chip which uses weird precharge logic, probably not four-phase, but I haven't figured out yet what's going on there. I've read some of the papers on four-phase logic, but haven't studied it closely enough to be sure of the above. So I welcome corrections and more information about the demise of four-phase logic.