3 ms·
> many of those bugs have been covered up for years by the relatively friendlier x86 memory model vs weaker models like ARM I had to take a peek at a friend's
by gopalv 6y ago
> many of those bugs have been covered up for years by the relatively friendlier x86 memory model vs weaker models like ARM
I had to take a peek at a friend's Cavium's ThunderX2 kernel issue a while back, which stops having concurrency when release build is swapped with a debug build.
So the specific part that drives you crazy is "Atomic can be reordered with stores - Y" for ARM and N for X86_64.
And changing the compiler optimization flags can turn on/off this bug.
- foobiekr 6y agoWe previously did a product based on the Octeon3. I feel sympathy for anyone who has to deal with Cavium's SDKs.