3 ms·

Yeah, I looked into this some more. High end ones seem to have it, but most MCUs do not. Anyway, there are many issues with taking advantage of this. I don't

Yeah, I looked into this some more. High end ones seem to have it, but most MCUs do not. Anyway, there are many issues with taking advantage of this. I don't think it's very likely that you're going to get the ideal linear decrease per frequency. There are arguments to made for run fast until stop, because it reduces the effect of leakage current, see: https://semiengineering.com/is-dvfs-worth-the-effort/ https://semiengineering.com/is-dvfs-worth-the-effort/

formerly_proven 6y ago
AFAIK low-power MCUs are always used in race-to-idle fashion because nothing beats <<1 µA sleep. For computer processors, DVFS isn't used like OP suggests, it's really more like Dynamic Temperature And Power Scaling (DTAPS), because it's meant to extract maximum performance from available power and thermal budget. Also while CPUs _do_ change power and frequency at >1 kHz, they're intentionally designed _not to_ downclock in the example GP gave (inter-frame idle).