6 ms·
https://en.wikipedia.org/wiki/MIPS_architecture#MIPS32/MIPS64 https://en.wikipedia.org/wiki/MIPS_architecture#MIPS32/MIPS6... It contains "possibly via trappin
by thesz 6y ago
https://en.wikipedia.org/wiki/MIPS_architecture#MIPS32/MIPS64 https://en.wikipedia.org/wiki/MIPS_architecture#MIPS32/MIPS6...
It contains "possibly via trapping" which I am not at all against of. What is interesting there that MIPS introduced BALIGN instruction which reminds me of first generation of Alpha ISA.
Alpha did not had byte or word (16-bit) memory access. These should be provided using 32-bit word access and some shuffling. They walked back on that for code size reasons and later Alpha ISAs had byte and 16-bit loads and stores. I do not have reference ready but I believe they were aligned accesses.