3 ms·
According to https://developer.arm.com/documentation/ddi0165/b/instruction-cycle-times/instruction-cycle-count-summary https://developer.arm.com/documentation/d
by progval 6y ago
According to https://developer.arm.com/documentation/ddi0165/b/instruction-cycle-times/instruction-cycle-count-summary https://developer.arm.com/documentation/ddi0165/b/instructio... ,
it's 17 clock cycles if the next instruction uses the last register (r15), otherwise 16
- monocasa 6y agoIf anyone is interested why R15 is special cased here a bit, it's because R15 is the program counter and that extra cycle is the interlock where they'd otherwise have to put a delay slot.
- progval 6y agoHmm, I didn't know about that. Then it would be 20 or something. (The special case I accounted for is because there's a bubble in the instruction pipeline if the next instruction uses the last register)