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@tails4e First - lets not mix integrated devices with pure FPGA. Second, electronics is trivial, very trivial even. Software isn't so much. Especially effective

@tails4e First - lets not mix integrated devices with pure FPGA. Second, electronics is trivial, very trivial even. Software isn't so much. Especially effective software that can automatically manage all interconnections between LUTs. It is not a rocket science tho, but significant entrance barrier to the market. That is why all the "FPGA" companies hold so much their binary formats as a secret and not open sourcing any tools.

tails4e 6y ago
This is priceless, "electronics is trivial". You clearly saw a few logic gates and determined that was all there is to know. I would say ASIC design is more difficult than most SW, and you have to get it right first time, no patches or releases are coming to fix a bug you found after the chip is manufactured. As it happens the types of SW that are amongst the hardest are the algorithms that go into Place and Route. There are bitstream formats that have been either opened or hacked, yet there is no open source SW tool that even comes close to the performance or capability of a commercial place and route tool. The reason is its very difficult to create thst kind of SW.
- danielEM 6y ago
  @tails4e: > You clearly saw a few logic gates Well, perhaps 5 years of studying digital electronics engineering is worthless here... ;-) Saw a few logic gates when was 15, now I'm 40, and saw them already more than few ;-) Don't get me wrong, I'm not underestimating issues related with entire way from design to manufactured product. But FPGA in not any "magic" different in terms of how you design it and how you manufacture it from other digital ICs. In case of AMD, they have well established internal process for pushing from design to production of new ICs. Design of LUT or internal routing logic is really trivial, especially when given a perspective of designing something like RYZEN. I'm sure AMD could do it itself without significantly noticeable financial effort to the company. Given above - software (and possibly software patents) is the only real advantage that XILINX might bring to AMD with that deal (unless AMD has plans to develop on new markets - which I don't really think so).
  - tails4e 6y ago
    FPGAs are way more than a few LUTs, the routing is complex, but must be efficient, there are many many hard blocks required to be useful (memories, dsp, transceivers, multi-standard IO, flexible programmable clock networks, clock generation with low latency over 10s of mm, etc.). There are way more blocks, but those are the basic ones, unless you want to design a 1980s FPGA of course! It is similar to how other ASICs are built, which is complex, and really complex at 7nm. I agree the RYZEN is also really complex, in a way a separate discipline - but the one point I come back to, many many startups have tried to build a better FPGA, and none have succeeded. If its so trivial, where is the RISC-V of the FPGA world?
    - danielEM 6y ago
      In case of compute purpoused FPGA designs you could just have pure LUTs and internal routing blocks, and for significant increase of speed and reducing power usage math blocks like multipliers or dividers would be a big improvement to pure FPGAs. And except programming and communication interface that would be all that AMD would need to introduce FPGA based compute solutions. > where is the RISC-V of the FPGA world? sounds like a challenge ;-)

tails4e 6y ago

This is priceless, "electronics is trivial". You clearly saw a few logic gates and determined that was all there is to know. I would say ASIC design is more difficult than most SW, and you have to get it right first time, no patches or releases are coming to fix a bug you found after the chip is manufactured. As it happens the types of SW that are amongst the hardest are the algorithms that go into Place and Route. There are bitstream formats that have been either opened or hacked, yet there is no open source SW tool that even comes close to the performance or capability of a commercial place and route tool. The reason is its very difficult to create thst kind of SW.

danielEM 6y ago
@tails4e: > You clearly saw a few logic gates Well, perhaps 5 years of studying digital electronics engineering is worthless here... ;-) Saw a few logic gates when was 15, now I'm 40, and saw them already more than few ;-) Don't get me wrong, I'm not underestimating issues related with entire way from design to manufactured product. But FPGA in not any "magic" different in terms of how you design it and how you manufacture it from other digital ICs. In case of AMD, they have well established internal process for pushing from design to production of new ICs. Design of LUT or internal routing logic is really trivial, especially when given a perspective of designing something like RYZEN. I'm sure AMD could do it itself without significantly noticeable financial effort to the company. Given above - software (and possibly software patents) is the only real advantage that XILINX might bring to AMD with that deal (unless AMD has plans to develop on new markets - which I don't really think so).
- tails4e 6y ago
  FPGAs are way more than a few LUTs, the routing is complex, but must be efficient, there are many many hard blocks required to be useful (memories, dsp, transceivers, multi-standard IO, flexible programmable clock networks, clock generation with low latency over 10s of mm, etc.). There are way more blocks, but those are the basic ones, unless you want to design a 1980s FPGA of course! It is similar to how other ASICs are built, which is complex, and really complex at 7nm. I agree the RYZEN is also really complex, in a way a separate discipline - but the one point I come back to, many many startups have tried to build a better FPGA, and none have succeeded. If its so trivial, where is the RISC-V of the FPGA world?
  - danielEM 6y ago
    In case of compute purpoused FPGA designs you could just have pure LUTs and internal routing blocks, and for significant increase of speed and reducing power usage math blocks like multipliers or dividers would be a big improvement to pure FPGAs. And except programming and communication interface that would be all that AMD would need to introduce FPGA based compute solutions. > where is the RISC-V of the FPGA world? sounds like a challenge ;-)