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>Why not generate it during the build? Is there a good reason not to do that? In many hardware shops the C definitions for the visible registers are generated
by Taniwha 6y ago
>Why not generate it during the build? Is there a good reason not to do that?
In many hardware shops the C definitions for the visible registers are generated automatically from the hardware's source code
- symlinkk 6y agoWait hardware has source code? I’m just a web dev so I’m not aware of this. What does the code look like?
- pwg 6y agoYes, there is "source code" for describing hardware. Here are two you can take a look at: VHDL: https://en.wikipedia.org/wiki/Vhdl https://en.wikipedia.org/wiki/Vhdl Verilog: https://en.wikipedia.org/wiki/Verilog https://en.wikipedia.org/wiki/Verilog
- Taniwha 6y agoDepends on what you're building, boards tend to be done as net lists (essentially a list of components and wires and how they are connected) - but digital chips of more more than a few dozen gates are normally written in a highlevel language (linked to by other posters here) which can be compiled into both machine code that can be simulated, and synthesised into gates and wires (a net list) that can be laid out onto a chip
- aasasd 6y agoI'll tell you more, hardware is often simulated in software from those source descriptions before going to any sort of production. Which is probably one of the reasons for the existence of these definition languages.
- Taniwha 6y agoand I should add ... chances are the linux kernel is not the primary user of these addresses, more likely it's the internal DV ('Design Verification' - hardware QA/testing) teams who need access to all those internal debug/setup/etc registers that are not normally architecturally visible to the downstream software teams (like Linux/etc)