I will agree that the split Address and Data registers are probably not the best architectural decision the desginers made. But in a pool of "be aware of these

I will agree that the split Address and Data registers are probably not the best architectural decision the desginers made. But in a pool of "be aware of these things", only having to deal with a half-dozen new concepts is a lot easier than the dozens of caveats and new concepts of many other processors. It is easier to teach "multiply is slow but this is how you do it" vs "here's a function you have to call, or need to write from scratch, to do a division." Regarding the stack processing, I mispoke; I was recalling a different CPU, whereby, given an address in the R(0), it is possible to execute an instruction at a different memory address than the one the PC is currently pointing at, effectively giving you a second PC, which was frequently used to execute a function without jumping to the function. The easiest way to describe that concept is a mix-in.