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As an FPGA dev, I tend to think of HDLs akin to HTML than “code”. It’s just a DSL to describe a graph. Actually pretty similar to how tensorflow is designed.
by coreblocks 6y ago
As an FPGA dev, I tend to think of HDLs akin to HTML than “code”. It’s just a DSL to describe a graph. Actually pretty similar to how tensorflow is designed.
- andy_ppp 6y agoYes would expect units of execution and different types of signal processing to come a pre-built blobs.