If you want to know what changed to get 20% performance increase - everything basically - but they focus on the 8 cores on a die can now access 32mb L3 cache di

If you want to know what changed to get 20% performance increase - everything basically - but they focus on the 8 cores on a die can now access 32mb L3 cache directly rather than two sets of 4 cores on a die accessing 2 x 16mb L3 cache. Here is the point in the video about IPC improvements: https://youtu.be/iuiO6rqYV4o?t=406 https://youtu.be/iuiO6rqYV4o?t=406