just a few minor comments: the cm-1 and cm-2 both supported up to 64k single bit processors, and as many 'virtual' processors as you wanted until their memorie

just a few minor comments: the cm-1 and cm-2 both supported up to 64k single bit processors, and as many 'virtual' processors as you wanted until their memories got too small the cm-5, while it did have a potentially mimd model, each mimd node was a sparc that was lashed to 4 simd vector units, with their own memory bandwidth. so you would be giving up a lot to just run on the sparcs. it was also pretty clumsy - I think there was just a message library one called from C? I think that its not entirely fair to compare the CMs to the Cray vector products. although somewhat similar, the programming model for the Crays was basically loop mining fortran and the CM really presented a model of 2^n fine grained processors. the precedent I always heard was the Iliac Note that Blelloch's favorite(?) primitive- the parallel prefix operation was used quite widely in the CM world, but equivalent 'horizontal' operations are pretty much completely lacking on the Intel/AMD instruction sets. Haven't looked at the GPU ones, but its absence is pretty frustrating