They're surprisingly difficult to use correctly, especially if you're trying to build something clever like lock-free data structures. Atomic access can use re

They're surprisingly difficult to use correctly, especially if you're trying to build something clever like lock-free data structures. Atomic access can use relaxed memory ordering, meaning that values don't actually change immediately for all threads. There are subtle rules about what changes the hardware and the optimizer can delay and reorder. It's like playing chess with threads. There's also a common pitfall that x86 hardware has more consistent and forgiving behavior than the spec for atomic operations. Broken atomic code may appear to work fine on x86, but fall apart on ARM.