4 ms·

I don’t think these results mean much. Take a look: https://godbolt.org/z/Wd98eG https://godbolt.org/z/Wd98eG When asked to divide 2 float numbers by another 2

I don’t think these results mean much. Take a look: https://godbolt.org/z/Wd98eG https://godbolt.org/z/Wd98eG When asked to divide 2 float numbers by another 2 numbers, clang compiler used division instruction for 4-wide vectors (for 32-bit floats, modern hardware only implements 4-wide and 8-wide vectors), that code runs 0.0 / 0.0 in the unused higher 2 lanes. That code is correct (we only want 2 lower lanes, and the result there is good), but FPSpy would then show these red lights for that software.

yorwba 6y ago
Does the vdivps instruction set the division-by-zero flag? If so, I don't think compiling code that doesn't divide by zero into code that does is correct.
- Const-me 6y ago
  > Does the vdivps instruction set the division-by-zero flag? Yes. It even triggers a runtime exception when these are enabled in the corresponding bit of MXCSR status register. > I don't think compiling code that doesn't divide by zero into code that does is correct. There’re good arguments both for and against. Personally, I think it’s fine. The optimization clang did almost doubled the performance. Most people don’t touch these bits in MXCSR, and the default values are good. When manually vectorizing, I sometimes manually writing code like that when the alternatives are much slower. In this particular example it’s possible to fix for free by replacing vmovsd with vmovddup, _mm_loaddup_pd in C++. But it’s not always the case, e.g. when dealing with 3D vectors you need extra instructions. In SSE the fastest way is _mm_insert_ps, it can either copy 3-rd lane into 4-th one, or selectively zero out lanes, a single very fast instructions that doesn't touch memory. In AVX however you would need memory access + _mm256_blend_ps.
- rrss 6y ago
  FYI, clang 10+ has support for -ffp-exception-behavior that enables configuring this behavior. > maytrap: The compiler avoids transformations that may raise exceptions that would not have been raised by the original code. Constant folding performed by the compiler is exempt from this option. https://releases.llvm.org/10.0.0/tools/clang/docs/UsersManual.html https://releases.llvm.org/10.0.0/tools/clang/docs/UsersManua... You can see here that this prevents clang from using vdivps: https://godbolt.org/z/WG7bEE https://godbolt.org/z/WG7bEE.

yorwba 6y ago

Does the vdivps instruction set the division-by-zero flag? If so, I don't think compiling code that doesn't divide by zero into code that does is correct.

Const-me 6y ago
> Does the vdivps instruction set the division-by-zero flag? Yes. It even triggers a runtime exception when these are enabled in the corresponding bit of MXCSR status register. > I don't think compiling code that doesn't divide by zero into code that does is correct. There’re good arguments both for and against. Personally, I think it’s fine. The optimization clang did almost doubled the performance. Most people don’t touch these bits in MXCSR, and the default values are good. When manually vectorizing, I sometimes manually writing code like that when the alternatives are much slower. In this particular example it’s possible to fix for free by replacing vmovsd with vmovddup, _mm_loaddup_pd in C++. But it’s not always the case, e.g. when dealing with 3D vectors you need extra instructions. In SSE the fastest way is _mm_insert_ps, it can either copy 3-rd lane into 4-th one, or selectively zero out lanes, a single very fast instructions that doesn't touch memory. In AVX however you would need memory access + _mm256_blend_ps.
rrss 6y ago
FYI, clang 10+ has support for -ffp-exception-behavior that enables configuring this behavior. > maytrap: The compiler avoids transformations that may raise exceptions that would not have been raised by the original code. Constant folding performed by the compiler is exempt from this option. https://releases.llvm.org/10.0.0/tools/clang/docs/UsersManual.html https://releases.llvm.org/10.0.0/tools/clang/docs/UsersManua... You can see here that this prevents clang from using vdivps: https://godbolt.org/z/WG7bEE https://godbolt.org/z/WG7bEE.