4 ms·

Which is still 12.5%. Which for most people wouldn't be a problem since ram is a fraction of the system price (so it might only raise the price of the machine 3

Which is still 12.5%. Which for most people wouldn't be a problem since ram is a fraction of the system price (so it might only raise the price of the machine 3% if the ram is 1/3 of the total BOM). The problem is _INTEL_ deciding its a premium feature, and the memory manufactures charging 50%+ more for 12.5% more hardware. So instead of being a couple percent of the system cost, it ends up being a noticeable double digit percentage. Of course none of this explains why apple/etc haven't done it in their phones.

Thetawaves 6y ago
You seem to be commenting on cost figures, but have not actually identified the cost / sales volume relationship. ECC memory physically requires additional wires, necessitating different parts that don't sell at the same volumes.
- StillBored 6y ago
  Not sure what volume has to do with it, if the whole market is ECC. And as far as "wires", traces are basically free as long as they don't force additional pcb layers, which shouldn't be the case given the careful pin/ddr chip/processor designs focused on exactly that. The extra pins are there regardless, and in the past so were the "wires" given that CBx/DMx pins were muxed. Further, packetized ram interfaces have been known to bury the error correction in the protocol same as PCIe/etc. Meaning its a slight efficiency loss. Look at it this way, every part of the system _EXCEPT_ the ram has some kind of error correction on it at this point. Its a cheap way to not only increase robustness but its also a security mechanism. If I were guessing, I would say that DDR5 is the last version that isn't ECC end to end, the idea that the manufactures can shrink the dies at the cost of some BER and make it up with a bit of embedded ECC will just be to tempting. Particularly with AMD on the rise, intel will have a much harder time playing product segmentation games if AMD doesn't do the same.
  - jasonwatkinspdx 6y ago
    It's not just about the cost of a pcb trace. A wider parallel bus means more potential skew which means either relaxing timing or tighter tolerances. The notional 12% cost for the extra ram bank and related hardware may not seem like much, but the margins on commodity computing equipment are razor thin. Consumers don't and won't buy on the basis of ECC being on a sticker on the box, so manufacturers correctly conclude that they should cut the feature or be undercut on price.
deleted 6y ago
[deleted]
sliken 6y ago
Dunno, I've notice it being a pretty minimal step up in price. Over a few generations the E3-1230 (quad core/8 threads) was cheaper then the similar I7. The clock speed is slightly less (100-200 Mhz), but I figure that's reasonable if you are going for a nice, cool, and reliable CPU. So I save $50 on the CPU and that just about covers the ram/motherboard premium.

Thetawaves 6y ago

You seem to be commenting on cost figures, but have not actually identified the cost / sales volume relationship. ECC memory physically requires additional wires, necessitating different parts that don't sell at the same volumes.

StillBored 6y ago
Not sure what volume has to do with it, if the whole market is ECC. And as far as "wires", traces are basically free as long as they don't force additional pcb layers, which shouldn't be the case given the careful pin/ddr chip/processor designs focused on exactly that. The extra pins are there regardless, and in the past so were the "wires" given that CBx/DMx pins were muxed. Further, packetized ram interfaces have been known to bury the error correction in the protocol same as PCIe/etc. Meaning its a slight efficiency loss. Look at it this way, every part of the system _EXCEPT_ the ram has some kind of error correction on it at this point. Its a cheap way to not only increase robustness but its also a security mechanism. If I were guessing, I would say that DDR5 is the last version that isn't ECC end to end, the idea that the manufactures can shrink the dies at the cost of some BER and make it up with a bit of embedded ECC will just be to tempting. Particularly with AMD on the rise, intel will have a much harder time playing product segmentation games if AMD doesn't do the same.
- jasonwatkinspdx 6y ago
  It's not just about the cost of a pcb trace. A wider parallel bus means more potential skew which means either relaxing timing or tighter tolerances. The notional 12% cost for the extra ram bank and related hardware may not seem like much, but the margins on commodity computing equipment are razor thin. Consumers don't and won't buy on the basis of ECC being on a sticker on the box, so manufacturers correctly conclude that they should cut the feature or be undercut on price.

deleted 6y ago

[deleted]

sliken 6y ago

Dunno, I've notice it being a pretty minimal step up in price. Over a few generations the E3-1230 (quad core/8 threads) was cheaper then the similar I7. The clock speed is slightly less (100-200 Mhz), but I figure that's reasonable if you are going for a nice, cool, and reliable CPU. So I save $50 on the CPU and that just about covers the ram/motherboard premium.