The key distinction is addressing modes usable in instructions. Even RISC architectures that spiral into complexity tend to keep the basic separation of LOAD/ST

The key distinction is addressing modes usable in instructions. Even RISC architectures that spiral into complexity tend to keep the basic separation of LOAD/STORE vs other instructions, while CISC almost always allows flexible arguments of registers, immediates, or a variety of memory address expressions to be used with most instructions.