> While VLIW like Itanium was limited to 3 ops/instruction, which is already behind today's OOO CPUs Itanium could group 3 instructions per 128 bit "bundle", b

> While VLIW like Itanium was limited to 3 ops/instruction, which is already behind today's OOO CPUs Itanium could group 3 instructions per 128 bit "bundle", but multiple bundles could be run in parallel, and the compiler had to insert explicit "stops" when that wasn't allowed. The architecture was designed specifically so that future processors could run old code with more parallelism. https://en.wikipedia.org/wiki/Explicitly_parallel_instruction_computing#Moving_beyond_VLIW https://en.wikipedia.org/wiki/Explicitly_parallel_instructio...