It seems to me that earlier RISC designs learned the same lesson with branch and load delay slots. They performed fine when introduced, but did not adapt well.

It seems to me that earlier RISC designs learned the same lesson with branch and load delay slots. They performed fine when introduced, but did not adapt well. All of this was tried to improve the speed of in-order CPUs. Once OOO became widespread, such hardware assists became pointless (And it would appear to me that the dependency assists you describe will similarly not stay relevant all that long).