A public hardware predecessor to Nitro can be seen in the "SmartNIC" academic research in several generations of https://NetFPGA.org https://NetFPGA.org hardwar

A public hardware predecessor to Nitro can be seen in the "SmartNIC" academic research in several generations of https://NetFPGA.org https://NetFPGA.org hardware. Today, hardware co-processors can be prototyped with an FPGA and open toolchains, see Ulf Frisk's work on DMA-based attacks, https://youtube.com/watch?v=5DbQr3Zo-XY https://youtube.com/watch?v=5DbQr3Zo-XY Meanwhile, AMD uses a closed-source Arm coprocessor (PSP) for SEV features like VM memory encryption, inside their x86 CPUs. Intel has upcoming hardware with dedicated x86 silicon to run an Intel-signed TDX (Trust Domain Extensions) hypervisor for VM security features, https://www.phoronix.com/scan.php?page=news_item&px=Intel-TDX-Better-VM-Secure https://www.phoronix.com/scan.php?page=news_item&px=Intel-TD... Kudos to Annapurna for blazing the Nitro trail. Their founder has since pioneered NVME-over-TCP storage virtualization, with optional FPGA acceleration from Lightbits Labs, code upstreamed to Linux. Hopefully the next few years will bring more open-hardware interposers for storage & network paths, for academic research and commercial prototyping.